| Message ID | 20250408-clk-cdce6214-v1-3-bd4e7092a91f@pengutronix.de (mailing list archive) |
|---|---|
| State | Changes Requested, archived |
| Headers | show |
| Series | clk: add support for TI CDCE6214 | expand |
On 08/04/2025 14:00, Sascha Hauer wrote: > + A nit, subject: drop second/last, redundant "binding". The "dt-bindings" prefix is already stating that these are bindings. See also: https://elixir.bootlin.com/linux/v6.7-rc8/source/Documentation/devicetree/bindings/submitting-patches.rst#L18 > +properties: > + compatible: > + enum: > + - ti,cdce6214 > + > + reg: > + maxItems: 1 > + > + clocks: > + minItems: 1 > + maxItems: 2 > + > + clock-names: > + minItems: 1 > + items: > + - const: priref > + - const: secref So one input is optional? > + > + '#address-cells': > + const: 1 > + > + '#size-cells': > + const: 0 > + > + "#clock-cells": Use consistent quotes, either ' or " > + const: 1 > + > +patternProperties: > + "^clk@[0-1]$": > + type: object > + description: | Do not need '|' unless you need to preserve formatting. > + optional child node that can be used to specify input pin parameters. The reg > + properties match the CDCE6214_CLK_* defines. > + > + additionalProperties: false > + > + properties: > + reg: > + description: > + clock input identifier. > + minimum: 0 > + maximum: 1 > + > + ti,ref-xtal: > + type: boolean > + description: | > + If true use input as XTAL input > + > + ti,ref-lvcmos: > + type: boolean > + description: | > + If true use input as LVCMOS input > + > + ti,ref-diff: > + type: boolean > + description: | > + If true use input as differential input So these three are an enum string. > + > + "^clk@[2-9]$": > + type: object > + description: | > + optional child node that can be used to specify output pin parameters. The reg > + properties match the CDCE6214_CLK_* defines. > + > + additionalProperties: false > + > + properties: > + reg: > + description: > + clock output identifier. > + minimum: 2 > + maximum: 9 > + > + ti,lphcsl: > + type: boolean > + description: | > + If true enable LP-HCSL output mode for this clock > + > + ti,lvds: > + type: boolean > + description: | > + If true enable LVDS output mode for this clock > + > + ti,cmosp: > + type: boolean > + description: | > + If true enable CMOSP output for this clock > + > + ti,cmosn: > + type: boolean > + description: | > + If true enable CMOSN output for this clock Looks the same here. Anyway having these as subnodes is too much. You have fixed number of clocks, so you need one or two array properties in top-level. > + > +required: > + - compatible > + - reg > + - clocks > + - "#clock-cells" > + > +additionalProperties: false > + > +examples: > + - | > + #include <dt-bindings/clock/ti,cdce6214.h> This file does not exist. Something is odd in this example. > + i2c { > + #address-cells = <1>; > + #size-cells = <0>; > + > + clock-generator@67 { > + compatible = "ti,cdce6214"; > + reg = <0x67>; > + #address-cells = <1>; > + #size-cells = <0>; > + #clock-cells = <1>; > + clocks = <&clock_ref25m>; > + clock-names = "priref"; > + > + clk@CDCE6214_CLK_SECREF { That's not a valid unit address. Use simple numbers, see DT spec and DTS coding style. Best regards, Krzysztof
On Tue, Apr 08, 2025 at 04:27:23PM +0200, Krzysztof Kozlowski wrote: > On 08/04/2025 14:00, Sascha Hauer wrote: > > + > > A nit, subject: drop second/last, redundant "binding". The "dt-bindings" > prefix is already stating that these are bindings. > See also: > https://elixir.bootlin.com/linux/v6.7-rc8/source/Documentation/devicetree/bindings/submitting-patches.rst#L18 > > > > +properties: > > + compatible: > > + enum: > > + - ti,cdce6214 > > + > > + reg: > > + maxItems: 1 > > + > > + clocks: > > + minItems: 1 > > + maxItems: 2 > > + > > + clock-names: > > + minItems: 1 > > + items: > > + - const: priref > > + - const: secref > > So one input is optional? The chip has two clock inputs and to be operational it needs at least one clock, could be priref or secref or both. Is there a proper way to express this situation? > > + "^clk@[2-9]$": > > + type: object > > + description: | > > + optional child node that can be used to specify output pin parameters. The reg > > + properties match the CDCE6214_CLK_* defines. > > + > > + additionalProperties: false > > + > > + properties: > > + reg: > > + description: > > + clock output identifier. > > + minimum: 2 > > + maximum: 9 > > + > > + ti,lphcsl: > > + type: boolean > > + description: | > > + If true enable LP-HCSL output mode for this clock > > + > > + ti,lvds: > > + type: boolean > > + description: | > > + If true enable LVDS output mode for this clock > > + > > + ti,cmosp: > > + type: boolean > > + description: | > > + If true enable CMOSP output for this clock > > + > > + ti,cmosn: > > + type: boolean > > + description: | > > + If true enable CMOSN output for this clock > > Looks the same here. Anyway having these as subnodes is too much. You > have fixed number of clocks, so you need one or two array properties in > top-level. There are several properties I haven't yet modeled, like - 1.8V / 2.5V output - sync_delay - LVDS common-mode trim increment/decrement - differential buffer BIAS trim - slew rate - BIAS current setting for XTAL mode - load capacity for XTAL mode I don't know which of them will ever be supported, but I thought having a node per pin would add a natural place to add these properties. Do you still think arrays would be more appropriate? > > > + > > +required: > > + - compatible > > + - reg > > + - clocks > > + - "#clock-cells" > > + > > +additionalProperties: false > > + > > +examples: > > + - | > > + #include <dt-bindings/clock/ti,cdce6214.h> > > This file does not exist. Something is odd in this example. It is added in the driver patch. Should it come with the binding patch instead? > > > + i2c { > > + #address-cells = <1>; > > + #size-cells = <0>; > > + > > + clock-generator@67 { > > + compatible = "ti,cdce6214"; > > + reg = <0x67>; > > + #address-cells = <1>; > > + #size-cells = <0>; > > + #clock-cells = <1>; > > + clocks = <&clock_ref25m>; > > + clock-names = "priref"; > > + > > + clk@CDCE6214_CLK_SECREF { > > That's not a valid unit address. Use simple numbers, see DT spec and DTS > coding style. CDCE6214_CLK_SECREF is a macro added in dt-bindings/clock/ti,cdce6214.h and it expands to a simple number (1 in this case). While I haven't found any examples of someone using macros for the unit address / reg property I thought I'd give it a try as it nicely shows how it is used. I can switch to plain numbers if you prefer that though. Sascha
On 08/04/2025 17:02, Sascha Hauer wrote: >>> + clock-names: >>> + minItems: 1 >>> + items: >>> + - const: priref >>> + - const: secref >> >> So one input is optional? > > The chip has two clock inputs and to be operational it needs at least > one clock, could be priref or secref or both. > > Is there a proper way to express this situation? No, this is fine, I just wanted to be sure that's the intention. > > >>> + "^clk@[2-9]$": >>> + type: object >>> + description: | >>> + optional child node that can be used to specify output pin parameters. The reg >>> + properties match the CDCE6214_CLK_* defines. >>> + >>> + additionalProperties: false >>> + >>> + properties: >>> + reg: >>> + description: >>> + clock output identifier. >>> + minimum: 2 >>> + maximum: 9 >>> + >>> + ti,lphcsl: >>> + type: boolean >>> + description: | >>> + If true enable LP-HCSL output mode for this clock >>> + >>> + ti,lvds: >>> + type: boolean >>> + description: | >>> + If true enable LVDS output mode for this clock >>> + >>> + ti,cmosp: >>> + type: boolean >>> + description: | >>> + If true enable CMOSP output for this clock >>> + >>> + ti,cmosn: >>> + type: boolean >>> + description: | >>> + If true enable CMOSN output for this clock >> >> Looks the same here. Anyway having these as subnodes is too much. You >> have fixed number of clocks, so you need one or two array properties in >> top-level. > > There are several properties I haven't yet modeled, like > > - 1.8V / 2.5V output > - sync_delay > - LVDS common-mode trim increment/decrement > - differential buffer BIAS trim > - slew rate > - BIAS current setting for XTAL mode > - load capacity for XTAL mode > > I don't know which of them will ever be supported, but I thought having a > node per pin would add a natural place to add these properties. Do you > still think arrays would be more appropriate? Binding is supposed to be complete. If you send incomplete, you get review like that. Several of these look like pinctrl thus maybe this should be pin controller as well. It's not exactly GPIO, but still configuring specific functions and pin characteristics is the exact job of pinctrl. > >> >>> + >>> +required: >>> + - compatible >>> + - reg >>> + - clocks >>> + - "#clock-cells" >>> + >>> +additionalProperties: false >>> + >>> +examples: >>> + - | >>> + #include <dt-bindings/clock/ti,cdce6214.h> >> >> This file does not exist. Something is odd in this example. > > It is added in the driver patch. Should it come with the binding patch > instead? Yes, because it is a binding. > >> >>> + i2c { >>> + #address-cells = <1>; >>> + #size-cells = <0>; >>> + >>> + clock-generator@67 { >>> + compatible = "ti,cdce6214"; >>> + reg = <0x67>; >>> + #address-cells = <1>; >>> + #size-cells = <0>; >>> + #clock-cells = <1>; >>> + clocks = <&clock_ref25m>; >>> + clock-names = "priref"; >>> + >>> + clk@CDCE6214_CLK_SECREF { >> >> That's not a valid unit address. Use simple numbers, see DT spec and DTS >> coding style. > > CDCE6214_CLK_SECREF is a macro added in dt-bindings/clock/ti,cdce6214.h > and it expands to a simple number (1 in this case). While I haven't > found any examples of someone using macros for the unit address / reg > property I thought I'd give it a try as it nicely shows how it is used. > > I can switch to plain numbers if you prefer that though. We don't encode addresses as headers in DTS (with few exception), so definitely not as a binding. It just does not bind anything (in the ABI). Best regards, Krzysztof
On Tue, Apr 08, 2025 at 05:02:21PM +0200, Sascha Hauer wrote: > On Tue, Apr 08, 2025 at 04:27:23PM +0200, Krzysztof Kozlowski wrote: > > On 08/04/2025 14:00, Sascha Hauer wrote: > > > + > > > > A nit, subject: drop second/last, redundant "binding". The "dt-bindings" > > prefix is already stating that these are bindings. > > See also: > > https://elixir.bootlin.com/linux/v6.7-rc8/source/Documentation/devicetree/bindings/submitting-patches.rst#L18 > > > > > > > +properties: > > > + compatible: > > > + enum: > > > + - ti,cdce6214 > > > + > > > + reg: > > > + maxItems: 1 > > > + > > > + clocks: > > > + minItems: 1 > > > + maxItems: 2 > > > + > > > + clock-names: > > > + minItems: 1 > > > + items: > > > + - const: priref > > > + - const: secref > > > > So one input is optional? > > The chip has two clock inputs and to be operational it needs at least > one clock, could be priref or secref or both. > > Is there a proper way to express this situation? If I understand correctly that only 'secref' is possible then you want: items: - enum: [ priref, secref ] - const: secref (By default, entries have to be unique, so that eliminates 'secref' in both) > > > > > + "^clk@[2-9]$": > > > + type: object > > > + description: | > > > + optional child node that can be used to specify output pin parameters. The reg > > > + properties match the CDCE6214_CLK_* defines. > > > + > > > + additionalProperties: false > > > + > > > + properties: > > > + reg: > > > + description: > > > + clock output identifier. > > > + minimum: 2 > > > + maximum: 9 > > > + > > > + ti,lphcsl: > > > + type: boolean > > > + description: | > > > + If true enable LP-HCSL output mode for this clock > > > + > > > + ti,lvds: > > > + type: boolean > > > + description: | > > > + If true enable LVDS output mode for this clock > > > + > > > + ti,cmosp: > > > + type: boolean > > > + description: | > > > + If true enable CMOSP output for this clock > > > + > > > + ti,cmosn: > > > + type: boolean > > > + description: | > > > + If true enable CMOSN output for this clock > > > > Looks the same here. Anyway having these as subnodes is too much. You > > have fixed number of clocks, so you need one or two array properties in > > top-level. > > There are several properties I haven't yet modeled, like > > - 1.8V / 2.5V output > - sync_delay > - LVDS common-mode trim increment/decrement > - differential buffer BIAS trim > - slew rate > - BIAS current setting for XTAL mode > - load capacity for XTAL mode > > I don't know which of them will ever be supported, but I thought having a > node per pin would add a natural place to add these properties. Do you > still think arrays would be more appropriate? Assuming they are connected to something in DT (if not, why care), you could add a flags cell so the consumer side can define what they need. > > > > > > + > > > +required: > > > + - compatible > > > + - reg > > > + - clocks > > > + - "#clock-cells" > > > + > > > +additionalProperties: false > > > + > > > +examples: > > > + - | > > > + #include <dt-bindings/clock/ti,cdce6214.h> > > > > This file does not exist. Something is odd in this example. > > It is added in the driver patch. Should it come with the binding patch > instead? Yes. Rob
On Fri, Apr 11, 2025 at 10:15:52AM -0500, Rob Herring wrote: > On Tue, Apr 08, 2025 at 05:02:21PM +0200, Sascha Hauer wrote: > > On Tue, Apr 08, 2025 at 04:27:23PM +0200, Krzysztof Kozlowski wrote: > > > On 08/04/2025 14:00, Sascha Hauer wrote: > > > > + > > > > > > A nit, subject: drop second/last, redundant "binding". The "dt-bindings" > > > prefix is already stating that these are bindings. > > > See also: > > > https://elixir.bootlin.com/linux/v6.7-rc8/source/Documentation/devicetree/bindings/submitting-patches.rst#L18 > > > > > > > > > > +properties: > > > > + compatible: > > > > + enum: > > > > + - ti,cdce6214 > > > > + > > > > + reg: > > > > + maxItems: 1 > > > > + > > > > + clocks: > > > > + minItems: 1 > > > > + maxItems: 2 > > > > + > > > > + clock-names: > > > > + minItems: 1 > > > > + items: > > > > + - const: priref > > > > + - const: secref > > > > > > So one input is optional? > > > > The chip has two clock inputs and to be operational it needs at least > > one clock, could be priref or secref or both. > > > > Is there a proper way to express this situation? > > If I understand correctly that only 'secref' is possible then you want: > > items: > - enum: [ priref, secref ] > - const: secref > > (By default, entries have to be unique, so that eliminates 'secref' in > both) Valid combinations shall be: - only secref - only priref - priref and secref. Background is: The CDCE6214 has a mux on these inputs, so you can select one of both in software. In our case only one input is actually used, but which one it is depends on the board designer. There are likely usecases in which both inputs are connected to different clocks so you want to decide during runtime depending on usecase. > > > Looks the same here. Anyway having these as subnodes is too much. You > > > have fixed number of clocks, so you need one or two array properties in > > > top-level. > > > > There are several properties I haven't yet modeled, like > > > > - 1.8V / 2.5V output > > - sync_delay > > - LVDS common-mode trim increment/decrement > > - differential buffer BIAS trim > > - slew rate > > - BIAS current setting for XTAL mode > > - load capacity for XTAL mode > > > > I don't know which of them will ever be supported, but I thought having a > > node per pin would add a natural place to add these properties. Do you > > still think arrays would be more appropriate? > > Assuming they are connected to something in DT (if not, why care), you > could add a flags cell so the consumer side can define what they need. Let's see if I got that right. Do you mean something like: cdce6214: clock-generator@67 { compatible = "ti,cdce6214"; #clock-cells = <2>; ... }; some-consumer { clocks = <&cdce6214 4 CDCE6214_SLEW_RATE_MAX | CDCE6214_BIAS(14)>; }; That would work for the outputs. What about the inputs? Sascha
diff --git a/Documentation/devicetree/bindings/clock/ti,cdce6214.yaml b/Documentation/devicetree/bindings/clock/ti,cdce6214.yaml new file mode 100644 index 0000000000000..63e6c9d9b1771 --- /dev/null +++ b/Documentation/devicetree/bindings/clock/ti,cdce6214.yaml @@ -0,0 +1,157 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/clock/ti,cdce6214.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: TI CDCE6214 programmable clock generator with PLL + +maintainers: + - Sascha Hauer <s.hauer@pengutronix.de> + +description: | + Ultra-Low Power Clock Generator With One PLL, Four Differential Outputs, + Two Inputs, and Internal EEPROM + + - CDCE6214: https://www.ti.com/product/CDCE6214 + +properties: + compatible: + enum: + - ti,cdce6214 + + reg: + maxItems: 1 + + clocks: + minItems: 1 + maxItems: 2 + + clock-names: + minItems: 1 + items: + - const: priref + - const: secref + + '#address-cells': + const: 1 + + '#size-cells': + const: 0 + + "#clock-cells": + const: 1 + +patternProperties: + "^clk@[0-1]$": + type: object + description: | + optional child node that can be used to specify input pin parameters. The reg + properties match the CDCE6214_CLK_* defines. + + additionalProperties: false + + properties: + reg: + description: + clock input identifier. + minimum: 0 + maximum: 1 + + ti,ref-xtal: + type: boolean + description: | + If true use input as XTAL input + + ti,ref-lvcmos: + type: boolean + description: | + If true use input as LVCMOS input + + ti,ref-diff: + type: boolean + description: | + If true use input as differential input + + "^clk@[2-9]$": + type: object + description: | + optional child node that can be used to specify output pin parameters. The reg + properties match the CDCE6214_CLK_* defines. + + additionalProperties: false + + properties: + reg: + description: + clock output identifier. + minimum: 2 + maximum: 9 + + ti,lphcsl: + type: boolean + description: | + If true enable LP-HCSL output mode for this clock + + ti,lvds: + type: boolean + description: | + If true enable LVDS output mode for this clock + + ti,cmosp: + type: boolean + description: | + If true enable CMOSP output for this clock + + ti,cmosn: + type: boolean + description: | + If true enable CMOSN output for this clock + +required: + - compatible + - reg + - clocks + - "#clock-cells" + +additionalProperties: false + +examples: + - | + #include <dt-bindings/clock/ti,cdce6214.h> + i2c { + #address-cells = <1>; + #size-cells = <0>; + + clock-generator@67 { + compatible = "ti,cdce6214"; + reg = <0x67>; + #address-cells = <1>; + #size-cells = <0>; + #clock-cells = <1>; + clocks = <&clock_ref25m>; + clock-names = "priref"; + + clk@CDCE6214_CLK_SECREF { + reg = <CDCE6214_CLK_SECREF>; + ti,ref-xtal; + }; + + clk@CDCE6214_CLK_OUT1 { + reg = <CDCE6214_CLK_OUT1>; + ti,cmosp; + ti,cmosn; + }; + + clk@CDCE6214_CLK_OUT2 { + reg = <CDCE6214_CLK_OUT2>; + ti,lvds; + }; + + clk@CDCE6214_CLK_OUT4 { + reg = <CDCE6214_CLK_OUT4>; + ti,cmosp; + ti,cmosn; + }; + }; + };
The CDCE6214 is a Ultra-Low Power Clock Generator With One PLL, Four Differential Outputs, Two Inputs, and Internal EEPROM. This patch adds the device tree binding for this chip. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> --- .../devicetree/bindings/clock/ti,cdce6214.yaml | 157 +++++++++++++++++++++ 1 file changed, 157 insertions(+)