From patchwork Fri Oct 21 20:15:07 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sergei Shtylyov X-Patchwork-Id: 9390055 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id E778160780 for ; Fri, 21 Oct 2016 20:15:13 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id D83A82A296 for ; Fri, 21 Oct 2016 20:15:13 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id CAF862A29C; Fri, 21 Oct 2016 20:15:13 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.3 required=2.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_HI, RCVD_IN_SORBS_SPAM, T_DKIM_INVALID autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 473BD2A296 for ; Fri, 21 Oct 2016 20:15:13 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1755676AbcJUUPM (ORCPT ); Fri, 21 Oct 2016 16:15:12 -0400 Received: from mail-lf0-f45.google.com ([209.85.215.45]:35001 "EHLO mail-lf0-f45.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754124AbcJUUPL (ORCPT ); Fri, 21 Oct 2016 16:15:11 -0400 Received: by mail-lf0-f45.google.com with SMTP id l131so148747147lfl.2 for ; Fri, 21 Oct 2016 13:15:10 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=cogentembedded-com.20150623.gappssmtp.com; s=20150623; h=from:to:cc:subject:date:message-id:organization:user-agent :in-reply-to:references:mime-version:content-transfer-encoding; bh=G8vHDPMmY7ViZMM7j4jwk3rhoyEf8SFXOFCCOn204go=; b=JhkfB418BYUCL0ww29Hf8DaIKL8sts/iQQ+kVnEg/wJAz422I59ao5OydktLsOa5Re H2lowya86rKr/fsW894MlY94jn/+hfxewlJx5w0TIQRpUmKDbT4HLVFWzjvsISnV5Wsa /Y2KZAMa9vwGAPerFs7AtInyFwI05eYxu9JwpA1svScTtteEdpefZiNKnjFZWe/v0D4I B9qG+W5gHGUN1i2Qu0IMiQhQQIB0gF1Ndh9QZtj8dOfTOC3WTaHiYSQyrFsHqBB8g18F Ofz/IU9ddo2u2FdCHDHsp1+FnPD8UDDgPalspKPLM79k/z8ygrEcv9JqXs7i31BuM5+f RqpA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:organization :user-agent:in-reply-to:references:mime-version :content-transfer-encoding; bh=G8vHDPMmY7ViZMM7j4jwk3rhoyEf8SFXOFCCOn204go=; b=IZjWRKy4UpLdcotUDivxzkJQm+hNGG/Fx6x9NQt3ZPaGUHHOPu+hKKNxLCdqq6uchI 09NtDLQppxN815giJlNukAnw07gImiE2J9FNxvT/cR6vJqOlxcpXcnFqdF6T066A/NTW SwhdoThVjbUSovAyklfNCIeqn0fpIEgzbin12qoS8n68XSyHYmAWdPax1Yqchv1j3NBr jOAjpotbB/w+vR1nosGthumPw4cOvVLvz3s9cVzQjZM9MumKUfUi+YTeKAa3MIB2SDIP EqrdFEIG/xIuHuKLqm1cRcwTwSg2CaZ5HDVgz5W4KIWxsbszT3B4TbjN3rbXCOxYFMVA 6+Wg== X-Gm-Message-State: ABUngvdxBKYzYJU/I2X0wNdGcbFDKBZrhyGGSynpEEUDfF8R1uD1nzKhIFZmP7IzCfXHQw== X-Received: by 10.25.23.154 with SMTP id 26mr1480263lfx.156.1477080909757; Fri, 21 Oct 2016 13:15:09 -0700 (PDT) Received: from wasted.cogentembedded.com ([31.173.81.212]) by smtp.gmail.com with ESMTPSA id f198sm736695lfe.10.2016.10.21.13.15.08 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 21 Oct 2016 13:15:09 -0700 (PDT) From: Sergei Shtylyov To: mturquette@baylibre.com, linux-clk@vger.kernel.org, sboyd@codeaurora.org, robh+dt@kernel.org, mark.rutland@arm.com, devicetree@vger.kernel.org Cc: linux-renesas-soc@vger.kernel.org, horms+renesas@verge.net.au Subject: [PATCH v3 1/2] ARM: shmobile: r8a7743: add CPG clock index macros Date: Fri, 21 Oct 2016 23:15:07 +0300 Message-ID: <21115355.YTPdgcs0id@wasted.cogentembedded.com> Organization: Cogent Embedded Inc. User-Agent: KMail/4.14.10 (Linux/4.7.7-100.fc23.x86_64; KDE/4.14.20; x86_64; ; ) In-Reply-To: <1582226.1VeLLfmmeJ@wasted.cogentembedded.com> References: <1582226.1VeLLfmmeJ@wasted.cogentembedded.com> MIME-Version: 1.0 Sender: linux-clk-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Add macros usable by the device tree sources to reference the R8A7743 CPG clocks by index. The data comes from the table 7.2b in the revision 0.50 of the RZ/G Series User's Manual. Signed-off-by: Sergei Shtylyov Reviewed-by: Geert Uytterhoeven --- Changes in version 3: - renumbered the #define's in order to match the R8A7791 CPG clocks; - added the reference to the manaual to the patch description. Changes in version 2: - reduced the macro value indentation. include/dt-bindings/clock/r8a7743-cpg-mssr.h | 43 +++++++++++++++++++++++++++ 1 file changed, 43 insertions(+) -- To unsubscribe from this list: send the line "unsubscribe linux-clk" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Index: linux/include/dt-bindings/clock/r8a7743-cpg-mssr.h =================================================================== --- /dev/null +++ linux/include/dt-bindings/clock/r8a7743-cpg-mssr.h @@ -0,0 +1,43 @@ +/* + * Copyright (C) 2016 Cogent Embedded Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + */ +#ifndef __DT_BINDINGS_CLOCK_R8A7743_CPG_MSSR_H__ +#define __DT_BINDINGS_CLOCK_R8A7743_CPG_MSSR_H__ + +#include + +/* r8a7743 CPG Core Clocks */ +#define R8A7743_CLK_Z 0 +#define R8A7743_CLK_ZG 1 +#define R8A7743_CLK_ZTR 2 +#define R8A7743_CLK_ZTRD2 3 +#define R8A7743_CLK_ZT 4 +#define R8A7743_CLK_ZX 5 +#define R8A7743_CLK_ZS 6 +#define R8A7743_CLK_HP 7 +#define R8A7743_CLK_B 9 +#define R8A7743_CLK_LB 10 +#define R8A7743_CLK_P 11 +#define R8A7743_CLK_CL 12 +#define R8A7743_CLK_M2 13 +#define R8A7743_CLK_ZB3 15 +#define R8A7743_CLK_ZB3D2 16 +#define R8A7743_CLK_DDR 17 +#define R8A7743_CLK_SDH 18 +#define R8A7743_CLK_SD0 19 +#define R8A7743_CLK_SD2 20 +#define R8A7743_CLK_SD3 21 +#define R8A7743_CLK_MMC0 22 +#define R8A7743_CLK_MP 23 +#define R8A7743_CLK_QSPI 26 +#define R8A7743_CLK_CP 27 +#define R8A7743_CLK_RCAN 28 +#define R8A7743_CLK_R 29 +#define R8A7743_CLK_OSC 30 + +#endif /* __DT_BINDINGS_CLOCK_R8A7743_CPG_MSSR_H__ */