| Message ID | 2d30e5ffe70ce35f952b7d497d2959391fbf0580.1739540679.git.geert+renesas@glider.be (mailing list archive) |
|---|---|
| State | Under Review |
| Headers | show |
| Series | Non-const bitfield helpers | expand |
It seems equivalent change, but I do not have chip nearby to do a quick test for mlx90614 so for that part: Acked-by: Crt Mori <cmo@melexis.com> Thanks for your contribution. On Fri, 14 Feb 2025 at 14:56, Geert Uytterhoeven <geert+renesas@glider.be> wrote: > > The existing FIELD_{GET,PREP}() macros are limited to compile-time > constants. However, it is very common to prepare or extract bitfield > elements where the bitfield mask is not a compile-time constant. > > To avoid this limitation, the AT91 clock driver and several other > drivers already have their own non-const field_{prep,get}() macros. > Make them available for general use by consolidating them in > <linux/bitfield.h>, and improve them slightly: > 1. Avoid evaluating macro parameters more than once, > 2. Replace "ffs() - 1" by "__ffs()", > 3. Support 64-bit use on 32-bit architectures. > > This is deliberately not merged into the existing FIELD_{GET,PREP}() > macros, as people expressed the desire to keep stricter variants for > increased safety, or for performance critical paths. > > Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> > Acked-by: Alexandre Belloni <alexandre.belloni@bootlin.com> > Acked-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> > --- > v3: > - Add Acked-by, > - Drop underscores from macro parameters, > - Use __auto_type where possible, > - Correctly cast reg to the mask type, > - Introduces __val and __reg intermediates to simplify the actual > operation, > - Drop unneeded parentheses, > - Clarify having both FIELD_{GET,PREP}() and field_{get,prep}(), > > v2: > - Cast val resp. reg to the mask type, > - Fix 64-bit use on 32-bit architectures, > - Convert new upstream users: > - drivers/crypto/intel/qat/qat_common/adf_gen4_pm_debugfs.c > - drivers/gpio/gpio-aspeed.c > - drivers/iio/temperature/mlx90614.c > - drivers/pinctrl/nuvoton/pinctrl-ma35.c > - sound/usb/mixer_quirks.c > - Convert new user queued in renesas-devel for v6.15: > - drivers/soc/renesas/rz-sysc.c > --- > drivers/clk/at91/clk-peripheral.c | 1 + > drivers/clk/at91/pmc.h | 3 -- > .../qat/qat_common/adf_gen4_pm_debugfs.c | 8 +---- > drivers/gpio/gpio-aspeed.c | 5 +-- > drivers/iio/temperature/mlx90614.c | 5 +-- > drivers/pinctrl/nuvoton/pinctrl-ma35.c | 4 --- > drivers/soc/renesas/rz-sysc.c | 3 +- > include/linux/bitfield.h | 36 +++++++++++++++++++ > sound/usb/mixer_quirks.c | 4 --- > 9 files changed, 41 insertions(+), 28 deletions(-) > > diff --git a/drivers/clk/at91/clk-peripheral.c b/drivers/clk/at91/clk-peripheral.c > index c173a44c800aa8cc..60208bdc3fe4797e 100644 > --- a/drivers/clk/at91/clk-peripheral.c > +++ b/drivers/clk/at91/clk-peripheral.c > @@ -3,6 +3,7 @@ > * Copyright (C) 2013 Boris BREZILLON <b.brezillon@overkiz.com> > */ > > +#include <linux/bitfield.h> > #include <linux/bitops.h> > #include <linux/clk-provider.h> > #include <linux/clkdev.h> > diff --git a/drivers/clk/at91/pmc.h b/drivers/clk/at91/pmc.h > index 4fb29ca111f7d427..3838e4f7df2d4a70 100644 > --- a/drivers/clk/at91/pmc.h > +++ b/drivers/clk/at91/pmc.h > @@ -116,9 +116,6 @@ struct at91_clk_pms { > unsigned int parent; > }; > > -#define field_get(_mask, _reg) (((_reg) & (_mask)) >> (ffs(_mask) - 1)) > -#define field_prep(_mask, _val) (((_val) << (ffs(_mask) - 1)) & (_mask)) > - > #define ndck(a, s) (a[s - 1].id + 1) > #define nck(a) (a[ARRAY_SIZE(a) - 1].id + 1) > > diff --git a/drivers/crypto/intel/qat/qat_common/adf_gen4_pm_debugfs.c b/drivers/crypto/intel/qat/qat_common/adf_gen4_pm_debugfs.c > index 2e4095c4c12c94f9..ebaa59e934178309 100644 > --- a/drivers/crypto/intel/qat/qat_common/adf_gen4_pm_debugfs.c > +++ b/drivers/crypto/intel/qat/qat_common/adf_gen4_pm_debugfs.c > @@ -1,5 +1,6 @@ > // SPDX-License-Identifier: GPL-2.0-only > /* Copyright(c) 2023 Intel Corporation */ > +#include <linux/bitfield.h> > #include <linux/dma-mapping.h> > #include <linux/kernel.h> > #include <linux/string_helpers.h> > @@ -11,13 +12,6 @@ > #include "adf_gen4_pm.h" > #include "icp_qat_fw_init_admin.h" > > -/* > - * This is needed because a variable is used to index the mask at > - * pm_scnprint_table(), making it not compile time constant, so the compile > - * asserts from FIELD_GET() or u32_get_bits() won't be fulfilled. > - */ > -#define field_get(_mask, _reg) (((_reg) & (_mask)) >> (ffs(_mask) - 1)) > - > #define PM_INFO_MEMBER_OFF(member) \ > (offsetof(struct icp_qat_fw_init_admin_pm_info, member) / sizeof(u32)) > > diff --git a/drivers/gpio/gpio-aspeed.c b/drivers/gpio/gpio-aspeed.c > index 40c1bd80f8b0434d..b45e4dd8d8e4f00a 100644 > --- a/drivers/gpio/gpio-aspeed.c > +++ b/drivers/gpio/gpio-aspeed.c > @@ -5,6 +5,7 @@ > * Joel Stanley <joel@jms.id.au> > */ > > +#include <linux/bitfield.h> > #include <linux/clk.h> > #include <linux/gpio/aspeed.h> > #include <linux/gpio/driver.h> > @@ -30,10 +31,6 @@ > #include <linux/gpio/consumer.h> > #include "gpiolib.h" > > -/* Non-constant mask variant of FIELD_GET() and FIELD_PREP() */ > -#define field_get(_mask, _reg) (((_reg) & (_mask)) >> (ffs(_mask) - 1)) > -#define field_prep(_mask, _val) (((_val) << (ffs(_mask) - 1)) & (_mask)) > - > #define GPIO_G7_IRQ_STS_BASE 0x100 > #define GPIO_G7_IRQ_STS_OFFSET(x) (GPIO_G7_IRQ_STS_BASE + (x) * 0x4) > #define GPIO_G7_CTRL_REG_BASE 0x180 > diff --git a/drivers/iio/temperature/mlx90614.c b/drivers/iio/temperature/mlx90614.c > index 740018d4b3dfb35e..c58dc59d4f570831 100644 > --- a/drivers/iio/temperature/mlx90614.c > +++ b/drivers/iio/temperature/mlx90614.c > @@ -22,6 +22,7 @@ > * the "wakeup" GPIO is not given, power management will be disabled. > */ > > +#include <linux/bitfield.h> > #include <linux/delay.h> > #include <linux/err.h> > #include <linux/gpio/consumer.h> > @@ -68,10 +69,6 @@ > #define MLX90614_CONST_SCALE 20 /* Scale in milliKelvin (0.02 * 1000) */ > #define MLX90614_CONST_FIR 0x7 /* Fixed value for FIR part of low pass filter */ > > -/* Non-constant mask variant of FIELD_GET() and FIELD_PREP() */ > -#define field_get(_mask, _reg) (((_reg) & (_mask)) >> (ffs(_mask) - 1)) > -#define field_prep(_mask, _val) (((_val) << (ffs(_mask) - 1)) & (_mask)) > - > struct mlx_chip_info { > /* EEPROM offsets with 16-bit data, MSB first */ > /* emissivity correction coefficient */ > diff --git a/drivers/pinctrl/nuvoton/pinctrl-ma35.c b/drivers/pinctrl/nuvoton/pinctrl-ma35.c > index 59c4e7c6cddea127..3ba28faa8e1418a9 100644 > --- a/drivers/pinctrl/nuvoton/pinctrl-ma35.c > +++ b/drivers/pinctrl/nuvoton/pinctrl-ma35.c > @@ -81,10 +81,6 @@ > #define MVOLT_1800 0 > #define MVOLT_3300 1 > > -/* Non-constant mask variant of FIELD_GET() and FIELD_PREP() */ > -#define field_get(_mask, _reg) (((_reg) & (_mask)) >> (ffs(_mask) - 1)) > -#define field_prep(_mask, _val) (((_val) << (ffs(_mask) - 1)) & (_mask)) > - > static const char * const gpio_group_name[] = { > "gpioa", "gpiob", "gpioc", "gpiod", "gpioe", "gpiof", "gpiog", > "gpioh", "gpioi", "gpioj", "gpiok", "gpiol", "gpiom", "gpion", > diff --git a/drivers/soc/renesas/rz-sysc.c b/drivers/soc/renesas/rz-sysc.c > index 1c98da37b7d18745..917a029d849585cd 100644 > --- a/drivers/soc/renesas/rz-sysc.c > +++ b/drivers/soc/renesas/rz-sysc.c > @@ -5,6 +5,7 @@ > * Copyright (C) 2024 Renesas Electronics Corp. > */ > > +#include <linux/bitfield.h> > #include <linux/io.h> > #include <linux/of.h> > #include <linux/platform_device.h> > @@ -12,8 +13,6 @@ > > #include "rz-sysc.h" > > -#define field_get(_mask, _reg) (((_reg) & (_mask)) >> (ffs(_mask) - 1)) > - > /** > * struct rz_sysc - RZ SYSC private data structure > * @base: SYSC base address > diff --git a/include/linux/bitfield.h b/include/linux/bitfield.h > index e8269f23b824c4a9..4f43b00cc93d2f4f 100644 > --- a/include/linux/bitfield.h > +++ b/include/linux/bitfield.h > @@ -203,4 +203,40 @@ __MAKE_OP(64) > #undef __MAKE_OP > #undef ____MAKE_OP > > +/** > + * field_prep() - prepare a bitfield element > + * @mask: shifted mask defining the field's length and position > + * @val: value to put in the field > + * > + * field_prep() masks and shifts up the value. The result should be > + * combined with other fields of the bitfield using logical OR. > + * Unlike FIELD_PREP(), @mask is not limited to a compile-time constant. > + */ > +#define field_prep(mask, val) \ > + ({ \ > + __auto_type __mask = (mask); \ > + typeof(mask) __val = (val); \ > + unsigned int __shift = sizeof(mask) <= 4 ? \ > + __ffs(__mask) : __ffs64(__mask); \ > + (__val << __shift) & __mask; \ > + }) > + > +/** > + * field_get() - extract a bitfield element > + * @mask: shifted mask defining the field's length and position > + * @reg: value of entire bitfield > + * > + * field_get() extracts the field specified by @mask from the > + * bitfield passed in as @reg by masking and shifting it down. > + * Unlike FIELD_GET(), @mask is not limited to a compile-time constant. > + */ > +#define field_get(mask, reg) \ > + ({ \ > + __auto_type __mask = (mask); \ > + typeof(mask) __reg = (reg); \ > + unsigned int __shift = sizeof(mask) <= 4 ? \ > + __ffs(__mask) : __ffs64(__mask); \ > + (__reg & __mask) >> __shift; \ > + }) > + > #endif > diff --git a/sound/usb/mixer_quirks.c b/sound/usb/mixer_quirks.c > index ed6127b0389fff39..5899576c915b0a7e 100644 > --- a/sound/usb/mixer_quirks.c > +++ b/sound/usb/mixer_quirks.c > @@ -3110,10 +3110,6 @@ static int snd_bbfpro_controls_create(struct usb_mixer_interface *mixer) > #define RME_DIGIFACE_REGISTER(reg, mask) (((reg) << 16) | (mask)) > #define RME_DIGIFACE_INVERT BIT(31) > > -/* Nonconst helpers */ > -#define field_get(_mask, _reg) (((_reg) & (_mask)) >> (ffs(_mask) - 1)) > -#define field_prep(_mask, _val) (((_val) << (ffs(_mask) - 1)) & (_mask)) > - > static int snd_rme_digiface_write_reg(struct snd_kcontrol *kcontrol, int item, u16 mask, u16 val) > { > struct usb_mixer_elem_list *list = snd_kcontrol_chip(kcontrol); > -- > 2.43.0 >
On Fri, 14 Feb 2025 14:55:51 +0100 Geert Uytterhoeven wrote: > The existing FIELD_{GET,PREP}() macros are limited to compile-time > constants. However, it is very common to prepare or extract bitfield > elements where the bitfield mask is not a compile-time constant. > > To avoid this limitation, the AT91 clock driver and several other > drivers already have their own non-const field_{prep,get}() macros. > Make them available for general use by consolidating them in > <linux/bitfield.h>, and improve them slightly: > 1. Avoid evaluating macro parameters more than once, > 2. Replace "ffs() - 1" by "__ffs()", > 3. Support 64-bit use on 32-bit architectures. > > This is deliberately not merged into the existing FIELD_{GET,PREP}() > macros, as people expressed the desire to keep stricter variants for > increased safety, or for performance critical paths. I really really think that people should just use the static inline helpers if the field is not constant. And we should do something like below so that people can actually find them. diff --git a/include/linux/bitfield.h b/include/linux/bitfield.h index 63928f173223..e02afcd7aeee 100644 --- a/include/linux/bitfield.h +++ b/include/linux/bitfield.h @@ -156,6 +156,80 @@ (typeof(_mask))(((_reg) & (_mask)) >> __bf_shf(_mask)); \ }) +/** + * u32_encode_bits() - prepare a u32 bitfield element (non-const) + * @v: value to put in the field + * @field: shifted mask defining the field's length and position + * + * Equivalent of FIELD_PREP() for u32, field does not have to be constant. + * + * Note that the helper is available for other field widths (generated below). + */ +static __always_inline __u32 u32_encode_bits(u32 v, u32 field) +{ + if (__builtin_constant_p(v) && (v & ~field_mask(field))) + __field_overflow(); + return ((v & field_mask(field)) * field_multiplier(field)); +} + +/** + * u32_replace_bits() - change a u32 bitfield element (non-const) + * @old: old u32 value to modify + * @val: value to put in the field + * @field: shifted mask defining the field's length and position + * + * Remove the current contents of the @field in @old and set it to @new. + * + * Note that the helper is available for other field widths (generated below). + */ +static __always_inline __u32 u32_replace_bits(__u32 old, u32 val, u32 field) +{ + return (old & ~(field)) | u32_encode_bits(val, field); +} + +/** + * u32_get_bits() - get u32 bitfield element (non-const) + * @v: value to extract the field from + * @field: shifted mask defining the field's length and position + * + * Extract the value of the field and shift it down. + * + * Note that the helper is available for other field widths (generated below). + */ +static __always_inline u32 u32_get_bits(__u32 v, u32 field) +{ + return ((v) & field) / field_multiplier(field); +} + +static __always_inline void u32p_replace_bits(__u32 * p, u32 val, u32 field) +{ + * p = ( * p & ~(field)) | u32_encode_bits(val, field); +} + +static __always_inline __le32 le32_encode_bits(u32 v, u32 field) +{ + if (__builtin_constant_p(v) && (v & ~field_mask(field))) + __field_overflow(); + return cpu_to_le32((v & field_mask(field)) * field_multiplier(field)); +} + +static __always_inline __le32 le32_replace_bits(__le32 old, u32 val, u32 field) +{ + return (old & ~cpu_to_le32(field)) | le32_encode_bits(val, field); +} + +static __always_inline void le32p_replace_bits(__le32 * p, u32 val, u32 field) +{ + * p = ( * p & ~cpu_to_le32(field)) | le32_encode_bits(val, field); +} + +static __always_inline u32 le32_get_bits(__le32 v, u32 field) +{ + return (le32_to_cpu(v) & field) / field_multiplier(field); +} + +/* Auto-generate bit ops for other field width and endian combination */ + extern void __compiletime_error("value doesn't fit into mask") __field_overflow(void); extern void __compiletime_error("bad bitfield mask") @@ -198,7 +272,7 @@ static __always_inline base type##_get_bits(__##type v, base field) \ ____MAKE_OP(u##size,u##size,,) ____MAKE_OP(u8,u8,,) __MAKE_OP(16) -__MAKE_OP(32) +____MAKE_OP(be32,u32,cpu_to_be32,be32_to_cpu) /* Other 32b types open coded */ __MAKE_OP(64) #undef __MAKE_OP #undef ____MAKE_OP
On Fri, 14 Feb 2025 07:34:02 -0800 Jakub Kicinski <kuba@kernel.org> wrote: > On Fri, 14 Feb 2025 14:55:51 +0100 Geert Uytterhoeven wrote: > > The existing FIELD_{GET,PREP}() macros are limited to compile-time > > constants. However, it is very common to prepare or extract bitfield > > elements where the bitfield mask is not a compile-time constant. > > > > To avoid this limitation, the AT91 clock driver and several other > > drivers already have their own non-const field_{prep,get}() macros. > > Make them available for general use by consolidating them in > > <linux/bitfield.h>, and improve them slightly: > > 1. Avoid evaluating macro parameters more than once, > > 2. Replace "ffs() - 1" by "__ffs()", > > 3. Support 64-bit use on 32-bit architectures. > > > > This is deliberately not merged into the existing FIELD_{GET,PREP}() > > macros, as people expressed the desire to keep stricter variants for > > increased safety, or for performance critical paths. > > I really really think that people should just use the static inline > helpers if the field is not constant. And we should do something like > below so that people can actually find them. Especially since you really don't want to be calling ffs() on variables. Much better to have saved the low bit and field width/mask. David
diff --git a/drivers/clk/at91/clk-peripheral.c b/drivers/clk/at91/clk-peripheral.c index c173a44c800aa8cc..60208bdc3fe4797e 100644 --- a/drivers/clk/at91/clk-peripheral.c +++ b/drivers/clk/at91/clk-peripheral.c @@ -3,6 +3,7 @@ * Copyright (C) 2013 Boris BREZILLON <b.brezillon@overkiz.com> */ +#include <linux/bitfield.h> #include <linux/bitops.h> #include <linux/clk-provider.h> #include <linux/clkdev.h> diff --git a/drivers/clk/at91/pmc.h b/drivers/clk/at91/pmc.h index 4fb29ca111f7d427..3838e4f7df2d4a70 100644 --- a/drivers/clk/at91/pmc.h +++ b/drivers/clk/at91/pmc.h @@ -116,9 +116,6 @@ struct at91_clk_pms { unsigned int parent; }; -#define field_get(_mask, _reg) (((_reg) & (_mask)) >> (ffs(_mask) - 1)) -#define field_prep(_mask, _val) (((_val) << (ffs(_mask) - 1)) & (_mask)) - #define ndck(a, s) (a[s - 1].id + 1) #define nck(a) (a[ARRAY_SIZE(a) - 1].id + 1) diff --git a/drivers/crypto/intel/qat/qat_common/adf_gen4_pm_debugfs.c b/drivers/crypto/intel/qat/qat_common/adf_gen4_pm_debugfs.c index 2e4095c4c12c94f9..ebaa59e934178309 100644 --- a/drivers/crypto/intel/qat/qat_common/adf_gen4_pm_debugfs.c +++ b/drivers/crypto/intel/qat/qat_common/adf_gen4_pm_debugfs.c @@ -1,5 +1,6 @@ // SPDX-License-Identifier: GPL-2.0-only /* Copyright(c) 2023 Intel Corporation */ +#include <linux/bitfield.h> #include <linux/dma-mapping.h> #include <linux/kernel.h> #include <linux/string_helpers.h> @@ -11,13 +12,6 @@ #include "adf_gen4_pm.h" #include "icp_qat_fw_init_admin.h" -/* - * This is needed because a variable is used to index the mask at - * pm_scnprint_table(), making it not compile time constant, so the compile - * asserts from FIELD_GET() or u32_get_bits() won't be fulfilled. - */ -#define field_get(_mask, _reg) (((_reg) & (_mask)) >> (ffs(_mask) - 1)) - #define PM_INFO_MEMBER_OFF(member) \ (offsetof(struct icp_qat_fw_init_admin_pm_info, member) / sizeof(u32)) diff --git a/drivers/gpio/gpio-aspeed.c b/drivers/gpio/gpio-aspeed.c index 40c1bd80f8b0434d..b45e4dd8d8e4f00a 100644 --- a/drivers/gpio/gpio-aspeed.c +++ b/drivers/gpio/gpio-aspeed.c @@ -5,6 +5,7 @@ * Joel Stanley <joel@jms.id.au> */ +#include <linux/bitfield.h> #include <linux/clk.h> #include <linux/gpio/aspeed.h> #include <linux/gpio/driver.h> @@ -30,10 +31,6 @@ #include <linux/gpio/consumer.h> #include "gpiolib.h" -/* Non-constant mask variant of FIELD_GET() and FIELD_PREP() */ -#define field_get(_mask, _reg) (((_reg) & (_mask)) >> (ffs(_mask) - 1)) -#define field_prep(_mask, _val) (((_val) << (ffs(_mask) - 1)) & (_mask)) - #define GPIO_G7_IRQ_STS_BASE 0x100 #define GPIO_G7_IRQ_STS_OFFSET(x) (GPIO_G7_IRQ_STS_BASE + (x) * 0x4) #define GPIO_G7_CTRL_REG_BASE 0x180 diff --git a/drivers/iio/temperature/mlx90614.c b/drivers/iio/temperature/mlx90614.c index 740018d4b3dfb35e..c58dc59d4f570831 100644 --- a/drivers/iio/temperature/mlx90614.c +++ b/drivers/iio/temperature/mlx90614.c @@ -22,6 +22,7 @@ * the "wakeup" GPIO is not given, power management will be disabled. */ +#include <linux/bitfield.h> #include <linux/delay.h> #include <linux/err.h> #include <linux/gpio/consumer.h> @@ -68,10 +69,6 @@ #define MLX90614_CONST_SCALE 20 /* Scale in milliKelvin (0.02 * 1000) */ #define MLX90614_CONST_FIR 0x7 /* Fixed value for FIR part of low pass filter */ -/* Non-constant mask variant of FIELD_GET() and FIELD_PREP() */ -#define field_get(_mask, _reg) (((_reg) & (_mask)) >> (ffs(_mask) - 1)) -#define field_prep(_mask, _val) (((_val) << (ffs(_mask) - 1)) & (_mask)) - struct mlx_chip_info { /* EEPROM offsets with 16-bit data, MSB first */ /* emissivity correction coefficient */ diff --git a/drivers/pinctrl/nuvoton/pinctrl-ma35.c b/drivers/pinctrl/nuvoton/pinctrl-ma35.c index 59c4e7c6cddea127..3ba28faa8e1418a9 100644 --- a/drivers/pinctrl/nuvoton/pinctrl-ma35.c +++ b/drivers/pinctrl/nuvoton/pinctrl-ma35.c @@ -81,10 +81,6 @@ #define MVOLT_1800 0 #define MVOLT_3300 1 -/* Non-constant mask variant of FIELD_GET() and FIELD_PREP() */ -#define field_get(_mask, _reg) (((_reg) & (_mask)) >> (ffs(_mask) - 1)) -#define field_prep(_mask, _val) (((_val) << (ffs(_mask) - 1)) & (_mask)) - static const char * const gpio_group_name[] = { "gpioa", "gpiob", "gpioc", "gpiod", "gpioe", "gpiof", "gpiog", "gpioh", "gpioi", "gpioj", "gpiok", "gpiol", "gpiom", "gpion", diff --git a/drivers/soc/renesas/rz-sysc.c b/drivers/soc/renesas/rz-sysc.c index 1c98da37b7d18745..917a029d849585cd 100644 --- a/drivers/soc/renesas/rz-sysc.c +++ b/drivers/soc/renesas/rz-sysc.c @@ -5,6 +5,7 @@ * Copyright (C) 2024 Renesas Electronics Corp. */ +#include <linux/bitfield.h> #include <linux/io.h> #include <linux/of.h> #include <linux/platform_device.h> @@ -12,8 +13,6 @@ #include "rz-sysc.h" -#define field_get(_mask, _reg) (((_reg) & (_mask)) >> (ffs(_mask) - 1)) - /** * struct rz_sysc - RZ SYSC private data structure * @base: SYSC base address diff --git a/include/linux/bitfield.h b/include/linux/bitfield.h index e8269f23b824c4a9..4f43b00cc93d2f4f 100644 --- a/include/linux/bitfield.h +++ b/include/linux/bitfield.h @@ -203,4 +203,40 @@ __MAKE_OP(64) #undef __MAKE_OP #undef ____MAKE_OP +/** + * field_prep() - prepare a bitfield element + * @mask: shifted mask defining the field's length and position + * @val: value to put in the field + * + * field_prep() masks and shifts up the value. The result should be + * combined with other fields of the bitfield using logical OR. + * Unlike FIELD_PREP(), @mask is not limited to a compile-time constant. + */ +#define field_prep(mask, val) \ + ({ \ + __auto_type __mask = (mask); \ + typeof(mask) __val = (val); \ + unsigned int __shift = sizeof(mask) <= 4 ? \ + __ffs(__mask) : __ffs64(__mask); \ + (__val << __shift) & __mask; \ + }) + +/** + * field_get() - extract a bitfield element + * @mask: shifted mask defining the field's length and position + * @reg: value of entire bitfield + * + * field_get() extracts the field specified by @mask from the + * bitfield passed in as @reg by masking and shifting it down. + * Unlike FIELD_GET(), @mask is not limited to a compile-time constant. + */ +#define field_get(mask, reg) \ + ({ \ + __auto_type __mask = (mask); \ + typeof(mask) __reg = (reg); \ + unsigned int __shift = sizeof(mask) <= 4 ? \ + __ffs(__mask) : __ffs64(__mask); \ + (__reg & __mask) >> __shift; \ + }) + #endif diff --git a/sound/usb/mixer_quirks.c b/sound/usb/mixer_quirks.c index ed6127b0389fff39..5899576c915b0a7e 100644 --- a/sound/usb/mixer_quirks.c +++ b/sound/usb/mixer_quirks.c @@ -3110,10 +3110,6 @@ static int snd_bbfpro_controls_create(struct usb_mixer_interface *mixer) #define RME_DIGIFACE_REGISTER(reg, mask) (((reg) << 16) | (mask)) #define RME_DIGIFACE_INVERT BIT(31) -/* Nonconst helpers */ -#define field_get(_mask, _reg) (((_reg) & (_mask)) >> (ffs(_mask) - 1)) -#define field_prep(_mask, _val) (((_val) << (ffs(_mask) - 1)) & (_mask)) - static int snd_rme_digiface_write_reg(struct snd_kcontrol *kcontrol, int item, u16 mask, u16 val) { struct usb_mixer_elem_list *list = snd_kcontrol_chip(kcontrol);
The existing FIELD_{GET,PREP}() macros are limited to compile-time constants. However, it is very common to prepare or extract bitfield elements where the bitfield mask is not a compile-time constant. To avoid this limitation, the AT91 clock driver and several other drivers already have their own non-const field_{prep,get}() macros. Make them available for general use by consolidating them in <linux/bitfield.h>, and improve them slightly: 1. Avoid evaluating macro parameters more than once, 2. Replace "ffs() - 1" by "__ffs()", 3. Support 64-bit use on 32-bit architectures. This is deliberately not merged into the existing FIELD_{GET,PREP}() macros, as people expressed the desire to keep stricter variants for increased safety, or for performance critical paths. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Alexandre Belloni <alexandre.belloni@bootlin.com> Acked-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> --- v3: - Add Acked-by, - Drop underscores from macro parameters, - Use __auto_type where possible, - Correctly cast reg to the mask type, - Introduces __val and __reg intermediates to simplify the actual operation, - Drop unneeded parentheses, - Clarify having both FIELD_{GET,PREP}() and field_{get,prep}(), v2: - Cast val resp. reg to the mask type, - Fix 64-bit use on 32-bit architectures, - Convert new upstream users: - drivers/crypto/intel/qat/qat_common/adf_gen4_pm_debugfs.c - drivers/gpio/gpio-aspeed.c - drivers/iio/temperature/mlx90614.c - drivers/pinctrl/nuvoton/pinctrl-ma35.c - sound/usb/mixer_quirks.c - Convert new user queued in renesas-devel for v6.15: - drivers/soc/renesas/rz-sysc.c --- drivers/clk/at91/clk-peripheral.c | 1 + drivers/clk/at91/pmc.h | 3 -- .../qat/qat_common/adf_gen4_pm_debugfs.c | 8 +---- drivers/gpio/gpio-aspeed.c | 5 +-- drivers/iio/temperature/mlx90614.c | 5 +-- drivers/pinctrl/nuvoton/pinctrl-ma35.c | 4 --- drivers/soc/renesas/rz-sysc.c | 3 +- include/linux/bitfield.h | 36 +++++++++++++++++++ sound/usb/mixer_quirks.c | 4 --- 9 files changed, 41 insertions(+), 28 deletions(-)