From patchwork Thu Oct 27 20:23:35 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sergei Shtylyov X-Patchwork-Id: 9400353 X-Patchwork-Delegate: sboyd@codeaurora.org Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id E8F4360231 for ; Thu, 27 Oct 2016 20:23:42 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id D70B32A3B9 for ; Thu, 27 Oct 2016 20:23:42 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id CB9E72A3BB; Thu, 27 Oct 2016 20:23:42 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.8 required=2.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_HI,T_DKIM_INVALID autolearn=unavailable version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id BC0302A3BA for ; Thu, 27 Oct 2016 20:23:41 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S941774AbcJ0UXl (ORCPT ); Thu, 27 Oct 2016 16:23:41 -0400 Received: from mail-lf0-f50.google.com ([209.85.215.50]:34950 "EHLO mail-lf0-f50.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S941699AbcJ0UXk (ORCPT ); Thu, 27 Oct 2016 16:23:40 -0400 Received: by mail-lf0-f50.google.com with SMTP id f134so36465231lfg.2 for ; Thu, 27 Oct 2016 13:23:39 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=cogentembedded-com.20150623.gappssmtp.com; s=20150623; h=from:to:cc:subject:date:message-id:organization:user-agent :in-reply-to:references:mime-version:content-transfer-encoding; bh=tFhXCSuUfLsI4liTYsZMfruXK9rpK8OeNweVTmCw0OU=; b=V7QcgBJLo+AKf9B+Kw8493ic/TGMTbPMvArUVjuXi4RReItGMl89uOTofjkJogyxYF RQ2eCRNht2c5uoAgIc/djF+tJEJoRlTfm058QmebMrUo6i1GhmwzpAEnyQBAHcY8KSrC crsErKfrCmwg4XwgY7WSAE3sEJmivN4m7+3uifBzY2JwJL7kuPWeKxLDqdNi8E0geaIb cFkpCnCJ54H79Exb2WH3+8BrYofM4El2O21nol6IXi4QQMdWQ03LkgDxAm1B3OBfKmBb nr3ua3EDTgFWHdNR66i0bpdRm3INA0fJNxkxcIzdO2kNrOC/SdMW2hBrch9dBgwmGfkl oSyA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:organization :user-agent:in-reply-to:references:mime-version :content-transfer-encoding; bh=tFhXCSuUfLsI4liTYsZMfruXK9rpK8OeNweVTmCw0OU=; b=amXA+ftMpR3yBbDDWvEMpJm5kDh/HrTNitH1JvTz/cMOtr8dMCpzcOjF5oat3E+bwl BjI6AdB+KIZo+f80TLwWNg9cf1a4PMbsVk2ajNK0z92RGhoH4g6MywJMKiDS23d9NqUM Hh0C5y4NVwU2pINBcqZ+Be2lXW0LQaKAsnKDA34ONfGg4EF39cwVTL/SKyZk2KbHtos1 V7sWpxVAsVzs/GNM7Q/hkrZKSZV2/c1xi33GNzZ9CgzlTYtUiYRX6K12k2s7PYGdR0T3 /DoFT5FeeS1aq93ujZBmQbyx0SoDsJZzW353F1hhcvZmCCLXGLNKdA6kUrvkD57SJcoV xsyA== X-Gm-Message-State: ABUngvdUpOrB/9S34ybjGJlKJNBcviBS2nFaDWmg/lnPz8tzw7GuEVPt1C5LjFDXdgKrww== X-Received: by 10.25.207.84 with SMTP id f81mr6749344lfg.155.1477599818185; Thu, 27 Oct 2016 13:23:38 -0700 (PDT) Received: from wasted.cogentembedded.com ([31.173.80.91]) by smtp.gmail.com with ESMTPSA id n6sm1490814lfd.45.2016.10.27.13.23.36 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 27 Oct 2016 13:23:37 -0700 (PDT) From: Sergei Shtylyov To: mturquette@baylibre.com, linux-clk@vger.kernel.org, sboyd@codeaurora.org, robh+dt@kernel.org, mark.rutland@arm.com, devicetree@vger.kernel.org Cc: linux-renesas-soc@vger.kernel.org, horms+renesas@verge.net.au Subject: [PATCH v4 1/2] ARM: shmobile: r8a7743: add CPG clock index macros Date: Thu, 27 Oct 2016 23:23:35 +0300 Message-ID: <3099806.ZmRHFh5yFn@wasted.cogentembedded.com> Organization: Cogent Embedded Inc. User-Agent: KMail/4.14.10 (Linux/4.7.9-100.fc23.x86_64; KDE/4.14.20; x86_64; ; ) In-Reply-To: <1590929.i2qFnIhqnT@wasted.cogentembedded.com> References: <1590929.i2qFnIhqnT@wasted.cogentembedded.com> MIME-Version: 1.0 Sender: linux-clk-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Add macros usable by the device tree sources to reference the R8A7743 CPG clocks by index. The data comes from the table 7.2b in the revision 0.50 of the RZ/G Series User's Manual. Signed-off-by: Sergei Shtylyov Reviewed-by: Geert Uytterhoeven --- Changes in version 4: - added Geert's tag. Changes in version 3: - renumbered the #define's in order to match the R8A7791 CPG clocks; - added the reference to the manual in the patch description. Changes in version 2: - reduced the macro value indentation. include/dt-bindings/clock/r8a7743-cpg-mssr.h | 43 +++++++++++++++++++++++++++ 1 file changed, 43 insertions(+) -- To unsubscribe from this list: send the line "unsubscribe linux-clk" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Index: linux/include/dt-bindings/clock/r8a7743-cpg-mssr.h =================================================================== --- /dev/null +++ linux/include/dt-bindings/clock/r8a7743-cpg-mssr.h @@ -0,0 +1,43 @@ +/* + * Copyright (C) 2016 Cogent Embedded Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + */ +#ifndef __DT_BINDINGS_CLOCK_R8A7743_CPG_MSSR_H__ +#define __DT_BINDINGS_CLOCK_R8A7743_CPG_MSSR_H__ + +#include + +/* r8a7743 CPG Core Clocks */ +#define R8A7743_CLK_Z 0 +#define R8A7743_CLK_ZG 1 +#define R8A7743_CLK_ZTR 2 +#define R8A7743_CLK_ZTRD2 3 +#define R8A7743_CLK_ZT 4 +#define R8A7743_CLK_ZX 5 +#define R8A7743_CLK_ZS 6 +#define R8A7743_CLK_HP 7 +#define R8A7743_CLK_B 9 +#define R8A7743_CLK_LB 10 +#define R8A7743_CLK_P 11 +#define R8A7743_CLK_CL 12 +#define R8A7743_CLK_M2 13 +#define R8A7743_CLK_ZB3 15 +#define R8A7743_CLK_ZB3D2 16 +#define R8A7743_CLK_DDR 17 +#define R8A7743_CLK_SDH 18 +#define R8A7743_CLK_SD0 19 +#define R8A7743_CLK_SD2 20 +#define R8A7743_CLK_SD3 21 +#define R8A7743_CLK_MMC0 22 +#define R8A7743_CLK_MP 23 +#define R8A7743_CLK_QSPI 26 +#define R8A7743_CLK_CP 27 +#define R8A7743_CLK_RCAN 28 +#define R8A7743_CLK_R 29 +#define R8A7743_CLK_OSC 30 + +#endif /* __DT_BINDINGS_CLOCK_R8A7743_CPG_MSSR_H__ */