From patchwork Mon Nov 27 15:41:29 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Maxime Ripard X-Patchwork-Id: 10077089 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id D6B11602BC for ; Mon, 27 Nov 2017 15:43:29 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id C826A28C17 for ; Mon, 27 Nov 2017 15:43:29 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id BCE9728E2B; Mon, 27 Nov 2017 15:43:29 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.9 required=2.0 tests=BAYES_00,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 5590E28C17 for ; Mon, 27 Nov 2017 15:43:29 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753055AbdK0PnO (ORCPT ); Mon, 27 Nov 2017 10:43:14 -0500 Received: from mail.free-electrons.com ([62.4.15.54]:32922 "EHLO mail.free-electrons.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752849AbdK0PmD (ORCPT ); Mon, 27 Nov 2017 10:42:03 -0500 Received: by mail.free-electrons.com (Postfix, from userid 110) id 2B586213EE; Mon, 27 Nov 2017 16:42:02 +0100 (CET) Received: from localhost (unknown [185.94.189.187]) by mail.free-electrons.com (Postfix) with ESMTPSA id EECF2213EB; Mon, 27 Nov 2017 16:42:01 +0100 (CET) From: Maxime Ripard To: Daniel Vetter , David Airlie , Chen-Yu Tsai , Maxime Ripard Cc: dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org, Mark Rutland , Rob Herring , linux-arm-kernel@lists.infradead.org, linux-clk@vger.kernel.org, plaes@plaes.org, icenowy@aosc.io, Thomas Petazzoni , jernej.skrabec@siol.net Subject: [PATCH v2 05/18] drm/sun4i: Force the mixer rate at 150MHz Date: Mon, 27 Nov 2017 16:41:29 +0100 Message-Id: <55becb3a86a0a28ccca3f7c831ac6f6cf4854390.1511797218.git-series.maxime.ripard@free-electrons.com> X-Mailer: git-send-email 2.14.3 In-Reply-To: References: In-Reply-To: References: Sender: linux-clk-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP It seems like the mixer can only run properly when clocked at 150MHz. In order to have something more robust than simply a fire-and-forget assigned-clocks-rate, let's put that in the code. Signed-off-by: Maxime Ripard --- drivers/gpu/drm/sun4i/sun8i_mixer.c | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/drivers/gpu/drm/sun4i/sun8i_mixer.c b/drivers/gpu/drm/sun4i/sun8i_mixer.c index cb193c5f1686..c0cdccf772a2 100644 --- a/drivers/gpu/drm/sun4i/sun8i_mixer.c +++ b/drivers/gpu/drm/sun4i/sun8i_mixer.c @@ -315,6 +315,13 @@ static int sun8i_mixer_bind(struct device *dev, struct device *master, } clk_prepare_enable(mixer->mod_clk); + /* + * It seems that we need to enforce that rate for whatever + * reason for the mixer to be functional. Make sure it's the + * case. + */ + clk_set_rate(mixer->mod_clk, 150000000); + list_add_tail(&mixer->engine.list, &drv->engine_list); /* Reset the registers */