diff mbox series

clk: renesas: r8a77970: add RPC clock

Message ID 5a5c65f1-d446-9445-4e2a-579f57f00abf@cogentembedded.com (mailing list archive)
State Awaiting Upstream, archived
Headers show
Series clk: renesas: r8a77970: add RPC clock | expand

Commit Message

Sergei Shtylyov Nov. 2, 2018, 7:25 p.m. UTC
On R-Car V3M (R8A77970), the RPC/RPCD2 clocks are output by the common
divider. Describe them, as well as the RPC-IF module clock.

Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>

---
This patch is against the 'clk-renesas' branch of Geert Uytterhoeven's
'renesas-drivers.git' repo.

 drivers/clk/renesas/r8a77970-cpg-mssr.c |    4 ++++
 1 file changed, 4 insertions(+)

Comments

Sergei Shtylyov Nov. 4, 2018, 8:09 a.m. UTC | #1
Oops, the subject should have "clocks", not "clock".
Geert Uytterhoeven Nov. 5, 2018, 1:20 p.m. UTC | #2
On Fri, Nov 2, 2018 at 8:25 PM Sergei Shtylyov
<sergei.shtylyov@cogentembedded.com> wrote:
> On R-Car V3M (R8A77970), the RPC/RPCD2 clocks are output by the common
> divider. Describe them, as well as the RPC-IF module clock.
>
> Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>

Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
i.e. will queue in clk-renesas-for-v4.21, with s/add/Add/ and s/clock/clocks/.

Gr{oetje,eeting}s,

                        Geert
diff mbox series

Patch

Index: renesas/drivers/clk/renesas/r8a77970-cpg-mssr.c
===================================================================
--- renesas.orig/drivers/clk/renesas/r8a77970-cpg-mssr.c
+++ renesas/drivers/clk/renesas/r8a77970-cpg-mssr.c
@@ -94,6 +94,9 @@  static const struct cpg_core_clk r8a7797
 		 CLK_PLL1_DIV2),
 	DEF_BASE("sd0",	R8A77970_CLK_SD0, CLK_TYPE_R8A77970_SD0, CLK_PLL1_DIV2),
 
+	DEF_FIXED("rpc",	R8A77970_CLK_RPC,   CLK_PLL1_DIV2,  5, 1),
+	DEF_FIXED("rpcd2",	R8A77970_CLK_RPCD2, CLK_PLL1_DIV2, 10, 1),
+
 	DEF_FIXED("cl",		R8A77970_CLK_CL,    CLK_PLL1_DIV2, 48, 1),
 	DEF_FIXED("cp",		R8A77970_CLK_CP,    CLK_EXTAL,	    2, 1),
 
@@ -155,6 +158,7 @@  static const struct mssr_mod_clk r8a7797
 	DEF_MOD("gpio1",		 911,	R8A77970_CLK_CP),
 	DEF_MOD("gpio0",		 912,	R8A77970_CLK_CP),
 	DEF_MOD("can-fd",		 914,	R8A77970_CLK_S2D2),
+	DEF_MOD("rpc-if",		 917,	R8A77970_CLK_RPC),
 	DEF_MOD("i2c4",			 927,	R8A77970_CLK_S2D2),
 	DEF_MOD("i2c3",			 928,	R8A77970_CLK_S2D2),
 	DEF_MOD("i2c2",			 929,	R8A77970_CLK_S2D2),