| Message ID | 7dd868d4673f155faa8c52d80a01d01aed2ea247.1555077720.git.leonard.crestez@nxp.com (mailing list archive) |
|---|---|
| State | Accepted, archived |
| Headers | show |
| Series | imx8mm-evk: Enable CPU freq and voltage switching | expand |
Quoting Leonard Crestez (2019-04-12 07:10:03) > Code which initializes the "clk_init_data.ops" checks pll->rate_table > before that field is ever assigned to so it always picks > "clk_pll1416x_min_ops". > > This breaks dynamic rate rounding for features such as cpufreq. > > Fix by checking pll_clk->rate_table instead, here pll_clk refers to > the constant initialization data coming from per-soc clk driver. > Any Fixes tag here? > Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com> > --- > drivers/clk/imx/clk-pll14xx.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) >
On 4/12/19 7:43 PM, Stephen Boyd wrote: > Quoting Leonard Crestez (2019-04-12 07:10:03) >> Code which initializes the "clk_init_data.ops" checks pll->rate_table >> before that field is ever assigned to so it always picks >> "clk_pll1416x_min_ops". >> >> This breaks dynamic rate rounding for features such as cpufreq. >> >> Fix by checking pll_clk->rate_table instead, here pll_clk refers to >> the constant initialization data coming from per-soc clk driver. > > Any Fixes tag here? Fixes: 8646d4dcc7fb ("clk: imx: Add PLLs driver for imx8mm soc") That's the only commit on this file, it's only for a very new SOC. -- Regards, Leonard
Quoting Leonard Crestez (2019-04-12 09:51:37) > On 4/12/19 7:43 PM, Stephen Boyd wrote: > > Quoting Leonard Crestez (2019-04-12 07:10:03) > >> Code which initializes the "clk_init_data.ops" checks pll->rate_table > >> before that field is ever assigned to so it always picks > >> "clk_pll1416x_min_ops". > >> > >> This breaks dynamic rate rounding for features such as cpufreq. > >> > >> Fix by checking pll_clk->rate_table instead, here pll_clk refers to > >> the constant initialization data coming from per-soc clk driver. > > > > Any Fixes tag here? > > Fixes: 8646d4dcc7fb ("clk: imx: Add PLLs driver for imx8mm soc") > > That's the only commit on this file, it's only for a very new SOC. > Ok. I take it I should push this into clk-fixes so it can fix badness in the v5.1 series?
On 4/12/2019 9:34 PM, Stephen Boyd wrote: > Quoting Leonard Crestez (2019-04-12 09:51:37) >> On 4/12/19 7:43 PM, Stephen Boyd wrote: >>> Quoting Leonard Crestez (2019-04-12 07:10:03) >>>> Code which initializes the "clk_init_data.ops" checks pll->rate_table >>>> before that field is ever assigned to so it always picks >>>> "clk_pll1416x_min_ops". >>>> >>>> This breaks dynamic rate rounding for features such as cpufreq. >>>> >>>> Fix by checking pll_clk->rate_table instead, here pll_clk refers to >>>> the constant initialization data coming from per-soc clk driver. >>> >>> Any Fixes tag here? >> >> Fixes: 8646d4dcc7fb ("clk: imx: Add PLLs driver for imx8mm soc") >> >> That's the only commit on this file, it's only for a very new SOC. > > Ok. I take it I should push this into clk-fixes so it can fix badness in > the v5.1 series? Since this a bugfix and the original patch is in v5.1 the answer would be yes. It would make a lot of sense to accept this separately from the rest of the series. The original patch is not in any release so there's no need for stuff like CC: stable.
Quoting Leonard Crestez (2019-04-12 07:10:03) > Code which initializes the "clk_init_data.ops" checks pll->rate_table > before that field is ever assigned to so it always picks > "clk_pll1416x_min_ops". > > This breaks dynamic rate rounding for features such as cpufreq. > > Fix by checking pll_clk->rate_table instead, here pll_clk refers to > the constant initialization data coming from per-soc clk driver. > > Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com> > --- Applied to clk-fixes
diff --git a/drivers/clk/imx/clk-pll14xx.c b/drivers/clk/imx/clk-pll14xx.c index 1acfa3e3cfb4..113d71042199 100644 --- a/drivers/clk/imx/clk-pll14xx.c +++ b/drivers/clk/imx/clk-pll14xx.c @@ -360,11 +360,11 @@ struct clk *imx_clk_pll14xx(const char *name, const char *parent_name, init.parent_names = &parent_name; init.num_parents = 1; switch (pll_clk->type) { case PLL_1416X: - if (!pll->rate_table) + if (!pll_clk->rate_table) init.ops = &clk_pll1416x_min_ops; else init.ops = &clk_pll1416x_ops; break; case PLL_1443X:
Code which initializes the "clk_init_data.ops" checks pll->rate_table before that field is ever assigned to so it always picks "clk_pll1416x_min_ops". This breaks dynamic rate rounding for features such as cpufreq. Fix by checking pll_clk->rate_table instead, here pll_clk refers to the constant initialization data coming from per-soc clk driver. Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com> --- drivers/clk/imx/clk-pll14xx.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)