From patchwork Thu Apr 6 16:49:02 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tero Kristo X-Patchwork-Id: 9667921 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 4D3BA602B3 for ; Thu, 6 Apr 2017 16:49:43 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id E03B528338 for ; Thu, 6 Apr 2017 16:49:42 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id D4F64285B6; Thu, 6 Apr 2017 16:49:42 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.8 required=2.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_HI,T_DKIM_INVALID autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 3CCBA28338 for ; Thu, 6 Apr 2017 16:49:42 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S933947AbdDFQtm (ORCPT ); Thu, 6 Apr 2017 12:49:42 -0400 Received: from lelnx193.ext.ti.com ([198.47.27.77]:17664 "EHLO lelnx193.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1755194AbdDFQti (ORCPT ); Thu, 6 Apr 2017 12:49:38 -0400 Received: from dlelxv90.itg.ti.com ([172.17.2.17]) by lelnx193.ext.ti.com (8.15.1/8.15.1) with ESMTP id v36Gn716032724; Thu, 6 Apr 2017 11:49:07 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ti.com; s=ti-com-17Q1; t=1491497347; bh=XxAIsNeGD5BFf2QEvlrFQKzHadfIgb5U6veixXYELYo=; h=Subject:To:References:CC:From:Date:In-Reply-To; b=hzQ0CYsulMVzbSBnRjbaAQEn15qlcR/m5T7DsPioDtZzdkQSBN6J1JncecoR/A5U+ AfFwb5pNgXcDdGQiqeHJTvWbZoRMFFb6bUdz0Q9vvq3nOGAK/3vslQcddbgmxAc0gJ wQdK5c9XmfIjdAnG77zXMiWjsoclDG2Ggm+35AnA= Received: from DLEE70.ent.ti.com (dlee70.ent.ti.com [157.170.170.113]) by dlelxv90.itg.ti.com (8.14.3/8.13.8) with ESMTP id v36Gn7qO004280; Thu, 6 Apr 2017 11:49:07 -0500 Received: from dlep32.itg.ti.com (157.170.170.100) by DLEE70.ent.ti.com (157.170.170.113) with Microsoft SMTP Server id 14.3.294.0; Thu, 6 Apr 2017 11:49:06 -0500 Received: from [172.22.5.0] (ileax41-snat.itg.ti.com [10.172.224.153]) by dlep32.itg.ti.com (8.14.3/8.13.8) with ESMTP id v36Gn2NC010695; Thu, 6 Apr 2017 11:49:03 -0500 Subject: Re: [PATCHv2 0/9] clk: ti: add support for clkctrl clocks To: Tony Lindgren References: <1489741781-12816-1-git-send-email-t-kristo@ti.com> <20170317152536.GT20572@atomide.com> <94d20a17-5072-ffab-3529-4bbb14327a10@ti.com> <20170323010057.GI10760@atomide.com> <20170323170210.GL10760@atomide.com> <8648f054-cf04-41df-20f3-82e0d63feefa@ti.com> <20170330165448.GF10760@atomide.com> <55b439ed-8b81-2e6b-64f1-34f9f3cc5369@ti.com> <20170403153604.GI10760@atomide.com> CC: , , , , From: Tero Kristo Message-ID: Date: Thu, 6 Apr 2017 19:49:02 +0300 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:45.0) Gecko/20100101 Thunderbird/45.7.0 MIME-Version: 1.0 In-Reply-To: <20170403153604.GI10760@atomide.com> Sender: linux-clk-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP On 03/04/17 18:36, Tony Lindgren wrote: > * Tero Kristo [170403 07:54]: >> On 30/03/17 19:54, Tony Lindgren wrote: >>> * Tero Kristo [170330 00:20]: >>>> On 23/03/17 19:02, Tony Lindgren wrote: >>>>> * Tony Lindgren [170322 18:03]: >>>>>> * Tero Kristo [170317 14:39]: >>>>>>> On 17/03/17 17:25, Tony Lindgren wrote: >>>>>>>> * Tero Kristo [170317 02:12]: >>>>>>>>> Any additional testing on omap4 welcome as this series basically >>>>>>>>> tweaks every possible peripheral clock on the SoC. >>>>>>>> >>>>>>>> Without the last patch in this series, booting fails for me: >>>>>>>> >>>>>>>> [ 5.074890] l4_per_cm:clk:0120:0: failed to disable >>>>>>>> [ 5.085113] l4_per_cm:clk:0128:0: failed to disable >>>>>>>> >>>>>>>> Care to check that booting keeps working for each patch in the >>>>>>>> series to avoid breaking git bisect for booting? >>>>>>> >>>>>>> Hmm, I think patch 8+9 need to be squashed then. I can double check this >>>>>>> next week though. >>>>>> >>>>>> Also looks like with this set merged HDMI stops working on >>>>>> omap4 with: >>>>>> >>>>>> HDMIWP: omapdss HDMIWP error: Failed to set PHY power mode to 1 >>>>> >>>>> Forgot to mention that's with omapdrm with encoder-tpd12s015 and >>>>> encoder-tfp410 modules loaded to get HDMI working. Here's more verbose >>>>> dmesg output in case that provides more clues: >>>>> >>>>> [ 91.042877] omapdss HDMICORE error: operation stopped when reading edid >>>>> [ 91.078308] [drm] Enabling DMM ywrap scrolling >>>>> [ 91.099243] omapdss HDMIWP error: Failed to set PHY power mode to 1 >>>>> [ 91.107879] omapdss HDMI error: failed to power on device >>>>> [ 91.107879] omapdrm omapdrm.0: Failed to enable display 'hdmi': -5 >>>>> [ 91.359619] omapdrm omapdrm.0: atomic complete timeout (pipe 0)! >>>>> [ 91.619964] omapdrm omapdrm.0: atomic complete timeout (pipe 0)! >>>>> [ 91.620300] Console: switching to colour frame buffer device 128x48 >>>>> [ 91.682434] omapdrm omapdrm.0: fb0: omapdrm frame buffer device >>>>> [ 91.770812] [drm] Initialized omapdrm 1.0.0 20110917 for omapdrm.0 on minor 0 >>>>> [ 92.818054] omapdss HDMICORE error: operation stopped when reading edid >>>>> [ 93.090087] omapdrm omapdrm.0: atomic complete timeout (pipe 0)! >>>>> [ 93.349853] omapdrm omapdrm.0: atomic complete timeout (pipe 0)! >>>>> >>>>> Regards, >>>>> >>>>> Tony >>>>> >>>> >>>> Can you try with this additional hwmod data tweak in place? Apply this on >>>> top of the existing series. >>> >>> Does not seem to help, still get the same errors. But maybe I'm doing >>> something wrong as the patch did not apply and I applied it manually. >>> >>> Regards, >>> >>> Tony >>> >> >> Hmm ok, can you provide some brief instructions how to test what you are >> doing with the HDMI? Just connect it to some external monitor? My monitor >> has a spare HDMI connector so I could try it out. > > Well build a kernel using omap2plus_defconfig, then with HDMI cable > connected load the following modules: > > encoder-tpd12s015 encoder-tfp410 connector-hdmi omapfb > > And a console should appear on the HDMI monitor. If using omapdrm, then > load omapdss and omapdrm instead. > > And if using NFSroot, you need to have ehci and smsc drivers built-in > or use an initramfs. Ok, I have a solution to the issue. Try the slightly modified patch below. It just required a couple of hwmod flags applied in addition to the patch I sent before. I also pushed a branch named "4.11-rc1-clkctrl-wip" as a reference, where also the hdmi works fine on omap4. --- To unsubscribe from this list: send the line "unsubscribe linux-clk" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html =================================== diff --git a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c index dad871a..43163b5 100644 --- a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c @@ -775,6 +775,7 @@ static struct omap_hwmod_opt_clk dss_hdmi_opt_clks[] = { { .role = "sys_clk", .clk = "dss_sys_clk" }, + { .role = "hdmi_clk", .clk = "dss_48mhz_clk" }, }; static struct omap_hwmod omap44xx_dss_hdmi_hwmod = { @@ -785,7 +786,7 @@ * HDMI audio requires to use no-idle mode. Hence, * set idle mode by software. */ - .flags = HWMOD_SWSUP_SIDLE, + .flags = HWMOD_SWSUP_SIDLE | HWMOD_OPT_CLKS_NEEDED, .mpu_irqs = omap44xx_dss_hdmi_irqs, .xlate_irq = omap4_xlate_irq, .sdma_reqs = omap44xx_dss_hdmi_sdma_reqs, @@ -858,11 +859,16 @@ }; /* dss_venc */ +static struct omap_hwmod_opt_clk dss_venc_opt_clks[] = { + { .role = "tv_clk", .clk = "dss_tv_clk" }, +}; + static struct omap_hwmod omap44xx_dss_venc_hwmod = { .name = "dss_venc", .class = &omap44xx_venc_hwmod_class, .clkdm_name = "l3_dss_clkdm", .main_clk = "dss_tv_clk", + .flags = HWMOD_OPT_CLKS_NEEDED, .prcm = { .omap4 = { .clkctrl_offs = OMAP4_CM_DSS_DSS_CLKCTRL_OFFSET, @@ -870,6 +876,8 @@ }, }, .parent_hwmod = &omap44xx_dss_hwmod, + .opt_clks = dss_venc_opt_clks, + .opt_clks_cnt = ARRAY_SIZE(dss_venc_opt_clks), }; /*