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Mon, 15 Jun 2015 23:53:09 +0000 Received: from stc-hedley.am.freescale.net (stc-hedley.am.freescale.net [10.67.70.12]) by tx30smr01.am.freescale.net (8.14.3/8.14.0) with ESMTP id t5FNr7ox003741; Mon, 15 Jun 2015 16:53:08 -0700 From: Victoria Milhoan To: CC: , , Subject: [PATCH RFC 04/11] crypto: caam - Modify Freescale CAAM driver Scatter Gather entry definition Date: Mon, 15 Jun 2015 16:52:52 -0700 Message-ID: <1434412379-11623-5-git-send-email-vicki.milhoan@freescale.com> X-Mailer: git-send-email 2.1.4 In-Reply-To: <1434412379-11623-1-git-send-email-vicki.milhoan@freescale.com> References: <1434412379-11623-1-git-send-email-vicki.milhoan@freescale.com> X-EOPAttributedMessage: 0 X-Microsoft-Exchange-Diagnostics: 1; BY2FFO11FD002; 1:vhn6eZiDuTXzFQuGwOGYC5YuVLFI3c9KvXJQPH35Z8Qyg6utJMIzeFN9kuW4X4pCCoaSUrQ1rPjq2t0iNwPIjk8biwB+879C8krArSMJO/itvijPAohIdyIK7cBSYUcqz8jwPOta9NXLQwZ2RQJ2GouGJJQgyLea3Q5lIWRkOHJXVMTFcR3MllHybhWKcqdY9XvMtHg7qbOMLj7BIp+WWiTuRYUnq6NgrpahELukmVECCmz2p8i67oxqqu6WAYp2TlRatD+pSJOsOBOqURb9CV8qu+zSCxjwGn6YP3AJcefcwohpgqpb/KpyTBaxgcJE0MnpRSIVy+iAGg+1WqRXCwGVfbMLyi2noZi2XoKMsus= X-Forefront-Antispam-Report: CIP:192.88.168.50; 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Signed-off-by: Victoria Milhoan --- drivers/crypto/caam/desc.h | 24 ++++++++++++++++++++---- 1 file changed, 20 insertions(+), 4 deletions(-) diff --git a/drivers/crypto/caam/desc.h b/drivers/crypto/caam/desc.h index d397ff9..67e3c89 100644 --- a/drivers/crypto/caam/desc.h +++ b/drivers/crypto/caam/desc.h @@ -8,13 +8,29 @@ #ifndef DESC_H #define DESC_H +/* + * 16-byte hardware scatter/gather table + * An 8-byte table exists in the hardware spec, but has never been + * implemented to date. The 8/16 option is selected at RTL-compile-time. + * and this selection is visible in the Compile Time Parameters Register + */ + +#define SEC4_SG_LEN_EXT 0x80000000 /* Entry points to table */ +#define SEC4_SG_LEN_FIN 0x40000000 /* Last ent in table */ +#define SEC4_SG_BPID_MASK 0x000000ff +#define SEC4_SG_BPID_SHIFT 16 +#define SEC4_SG_LEN_MASK 0x3fffffff /* Excludes EXT and FINAL */ +#define SEC4_SG_OFFS_MASK 0x00001fff + struct sec4_sg_entry { +#ifdef CONFIG_64BIT u64 ptr; -#define SEC4_SG_LEN_FIN 0x40000000 -#define SEC4_SG_LEN_EXT 0x80000000 +#else + u32 reserved; + u32 ptr; +#endif u32 len; - u8 reserved; - u8 buf_pool_id; + u16 buf_pool_id; u16 offset; };