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Fri, 21 Aug 2015 15:53:40 +0000 Received: from enigma.ea.freescale.net (enigma.ea.freescale.net [10.171.77.120]) by az84smr01.freescale.net (8.14.3/8.14.0) with ESMTP id t7LFrYeG029287; Fri, 21 Aug 2015 08:53:36 -0700 From: =?UTF-8?q?Horia=20Geant=C4=83?= To: Herbert Xu CC: Subject: [PATCH] crypto: caam - fix writing to JQCR_MS when using service interface Date: Fri, 21 Aug 2015 18:53:20 +0300 Message-ID: <1440172400-3333-1-git-send-email-horia.geanta@freescale.com> X-Mailer: git-send-email 2.4.4 MIME-Version: 1.0 X-EOPAttributedMessage: 0 X-Microsoft-Exchange-Diagnostics: 1; BY2FFO11FD037; 1:gPRxC9vdNriYDqvr720XBrETlKK/IaEkLhHELThi4T6XWedz9astmXoKGHmJ8fMZr948hlGH9dWGN8VjVFiS7gtxNNzntQ3V7ZUJY2ODyzIHo5ev9cgu7HqJDHKb79LLKzPyQuZQyL0P/r5CvZOe2BBRjK9Y7vkR+Rabr1N5y3mct3AjkEwAG72vRJusv89ZNr4+HGZeksLmLO5wx0S6ieE2ro0AB5JSK38xRfJUX3WJ7ZkNusxDijeE7Rmhln1I/mXJJZxYuwQ9cz32ZOcsaZ/rUEzUZFLn9MkRBt+KswCQVhsc/6ma/KiHtumG1wphpyv7oEyZnXk7YmteQhxXDQaq4OoAUkMOMzR1vUTgFEoVyl83KRZOD8bokr3y74wL X-Forefront-Antispam-Report: CIP:192.88.158.2; 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DM2PR03MB493; 5:AT+dfyO/qKE4M3QVdwsxwRlITdcPbM/czFHA57J/pJft6HKuCRKCo4p1vo0IVP8DZQRCX0n/+YnToGy9GEcWtGSiO12I46lA9PZ4KD6vtfZt7d5mJglJ9rry51f8WbARx9p4PS7PRq91Ugx7G26AuA==; 24:QCvr6D+4EaQoEilRidXId1HvkP7vhsZKoPv/4KUBjFmuBjRCtOYkwQoop/BeL6ia8Yq2eYWppQ9Kzqzg96IWulD6pyjhbyRmFocm03oQbWw=; 20:n0Sy0ozdWPFU09xVQr10U4+hKZZqI5j1y/2M0LyectauAwxxNjSw6x+3pGpckTSUiIbtuFN0H9P/yzuWDNHp6Q== SpamDiagnosticOutput: 1:23 SpamDiagnosticMetadata: NSPM X-OriginatorOrg: freescale.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 21 Aug 2015 15:53:40.2480 (UTC) X-MS-Exchange-CrossTenant-Id: 710a03f5-10f6-4d38-9ff4-a80b81da590d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=710a03f5-10f6-4d38-9ff4-a80b81da590d; Ip=[192.88.158.2]; Helo=[az84smr01.freescale.net] X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM2PR03MB493 Sender: linux-crypto-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-crypto@vger.kernel.org X-Spam-Status: No, score=-7.7 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=ham version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Most significant part of JQCR (Job Queue Control Register) contains bits that control endianness: ILE - Immediate Little Endian, DWS - Double Word Swap. The bits are automatically set by the Job Queue Controller HW. Unfortunately these bits are cleared in SW when submitting descriptors via the register-based service interface. From LS1021A: JQCR_MS = 08080100 - before writing: ILE | DWS | SRC (JR0) JQCR_MS = 30000100 - after writing: WHL | FOUR | SRC (JR0) This would cause problems on little endian caam for descriptors containing immediata data or double-word pointers. Currently there is no problem since the only descriptors ran through this interface are the ones that (un)instantiate RNG. Signed-off-by: Horia Geant? --- It does not affect current driver, thus not Cc-ing stable. drivers/crypto/caam/ctrl.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/crypto/caam/ctrl.c b/drivers/crypto/caam/ctrl.c index 81b552d1ad91..09c16f5ea97d 100644 --- a/drivers/crypto/caam/ctrl.c +++ b/drivers/crypto/caam/ctrl.c @@ -139,7 +139,7 @@ static inline int run_descriptor_deco0(struct device *ctrldev, u32 *desc, flags |= DECO_JQCR_FOUR; /* Instruct the DECO to execute it */ - wr_reg32(&deco->jr_ctl_hi, flags); + setbits32(&deco->jr_ctl_hi, flags); timeout = 10000000; do {