From patchwork Thu Oct 22 06:51:49 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Corentin Labbe X-Patchwork-Id: 7462711 X-Patchwork-Delegate: herbert@gondor.apana.org.au Return-Path: X-Original-To: patchwork-linux-crypto@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 07E18BEEA4 for ; Thu, 22 Oct 2015 06:52:02 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 11DB92099E for ; Thu, 22 Oct 2015 06:52:01 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 1911C2094F for ; Thu, 22 Oct 2015 06:52:00 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751554AbbJVGv6 (ORCPT ); Thu, 22 Oct 2015 02:51:58 -0400 Received: from mail-wi0-f175.google.com ([209.85.212.175]:35541 "EHLO mail-wi0-f175.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751352AbbJVGv5 (ORCPT ); Thu, 22 Oct 2015 02:51:57 -0400 Received: by wicll6 with SMTP id ll6so121096266wic.0; Wed, 21 Oct 2015 23:51:56 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:cc:subject:date:message-id; bh=53vwODgNXcs09UkyCw+bj/8d2/M7j0HWEk+aj6V42Jc=; b=C/bGd6ex5nnkUz1/Qzdn4q9qbEpqoSSMKW7boIMN2ZS3LTwnpPjURiQp6CahJC4MjH iDTgxc+EUJ3bxbKWhL7eL3ATCk+GxzMdVnRQif1n9hrdybm+k+ciAeuVtLBfKown/7Aq KC5HOfolCXl+qSHjoDxppV6qlW0W8k2LBAok9elcyaGAY8UKoLiOMktE30Q0A5i5XwF4 h63U2Sr/nMROh2Y6L46tvGb1l559yHrwWs/bbF1FcRTq+gtPmfBFWHhpWI2oMaHPRmNs cGOsM047x1vo1I/U5/QzQcq6zmC8H1mq7kLNgSerL3pmE4FidEAy3loDj0pPLsex2VoI WyxQ== X-Received: by 10.194.192.6 with SMTP id hc6mr14959034wjc.33.1445496716601; Wed, 21 Oct 2015 23:51:56 -0700 (PDT) Received: from Red.local (ANice-651-1-260-13.w86-205.abo.wanadoo.fr. [86.205.164.13]) by smtp.googlemail.com with ESMTPSA id ka10sm14906344wjc.30.2015.10.21.23.51.55 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Wed, 21 Oct 2015 23:51:56 -0700 (PDT) From: LABBE Corentin To: davem@davemloft.net, herbert@gondor.apana.org.au Cc: LABBE Corentin , linux-crypto@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 1/4] crypto: hifn_795x: replace simple_strtoul by kstrtouint Date: Thu, 22 Oct 2015 08:51:49 +0200 Message-Id: <1445496712-5654-1-git-send-email-clabbe.montjoie@gmail.com> X-Mailer: git-send-email 2.4.10 Sender: linux-crypto-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-crypto@vger.kernel.org X-Spam-Status: No, score=-6.8 required=5.0 tests=BAYES_00, DKIM_ADSP_CUSTOM_MED, DKIM_SIGNED, FREEMAIL_FROM, RCVD_IN_DNSWL_HI, RP_MATCHES_RCVD, T_DKIM_INVALID, UNPARSEABLE_RELAY autolearn=ham version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP The simple_strtoul function is marked as obsolete. This patch replace it by kstrtouint at the cost of changing some function return type from void to int. Signed-off-by: LABBE Corentin --- drivers/crypto/hifn_795x.c | 28 ++++++++++++++++++++-------- 1 file changed, 20 insertions(+), 8 deletions(-) diff --git a/drivers/crypto/hifn_795x.c b/drivers/crypto/hifn_795x.c index 8d2a772..079b995 100644 --- a/drivers/crypto/hifn_795x.c +++ b/drivers/crypto/hifn_795x.c @@ -970,10 +970,11 @@ static void hifn_init_dma(struct hifn_device *dev) * 66MHz since according to Mike Ham of HiFn, almost every board in existence * has an external crystal populated at 66MHz. */ -static void hifn_init_pll(struct hifn_device *dev) +static int hifn_init_pll(struct hifn_device *dev) { unsigned int freq, m; u32 pllcfg; + int err; pllcfg = HIFN_1_PLL | HIFN_PLL_RESERVED_1; @@ -982,9 +983,11 @@ static void hifn_init_pll(struct hifn_device *dev) else pllcfg |= HIFN_PLL_REF_CLK_HBI; - if (hifn_pll_ref[3] != '\0') - freq = simple_strtoul(hifn_pll_ref + 3, NULL, 10); - else { + if (hifn_pll_ref[3] != '\0') { + err = kstrtouint(hifn_pll_ref + 3, 10, &freq); + if (err) + return err; + } else { freq = 66; printk(KERN_INFO "hifn795x: assuming %uMHz clock speed, " "override with hifn_pll_ref=%.3s\n", @@ -1021,11 +1024,13 @@ static void hifn_init_pll(struct hifn_device *dev) * in slightly larger intervals. */ dev->pk_clk_freq = 1000000 * (freq + 1) * m / 2; + return 0; } -static void hifn_init_registers(struct hifn_device *dev) +static int hifn_init_registers(struct hifn_device *dev) { u32 dptr = dev->desc_dma; + int err; /* Initialization magic... */ hifn_write_0(dev, HIFN_0_PUCTRL, HIFN_PUCTRL_DMAENA); @@ -1090,13 +1095,16 @@ static void hifn_init_registers(struct hifn_device *dev) #else hifn_write_0(dev, HIFN_0_PUCNFG, 0x10342); #endif - hifn_init_pll(dev); + err = hifn_init_pll(dev); + if (err) + return err; hifn_write_0(dev, HIFN_0_PUISR, HIFN_PUISR_DSTOVER); hifn_write_1(dev, HIFN_1_DMA_CNFG, HIFN_DMACNFG_MSTRESET | HIFN_DMACNFG_DMARESET | HIFN_DMACNFG_MODE | HIFN_DMACNFG_LAST | ((HIFN_POLL_FREQUENCY << 16 ) & HIFN_DMACNFG_POLLFREQ) | ((HIFN_POLL_SCALAR << 8) & HIFN_DMACNFG_POLLINVAL)); + return 0; } static int hifn_setup_base_command(struct hifn_device *dev, u8 *buf, @@ -1711,7 +1719,9 @@ static int hifn_start_device(struct hifn_device *dev) hifn_init_dma(dev); - hifn_init_registers(dev); + err = hifn_init_registers(dev); + if (err) + return err; hifn_init_pubrng(dev); @@ -2763,7 +2773,9 @@ static int __init hifn_init(void) * but this chip is currently not supported. */ if (hifn_pll_ref[3] != '\0') { - freq = simple_strtoul(hifn_pll_ref + 3, NULL, 10); + err = kstrtouint(hifn_pll_ref + 3, 10, &freq); + if (err) + return err; if (freq < 20 || freq > 100) { printk(KERN_ERR "hifn795x: invalid hifn_pll_ref " "frequency, must be in the range "