From patchwork Thu May 12 15:06:18 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tudor Ambarus X-Patchwork-Id: 9082701 X-Patchwork-Delegate: herbert@gondor.apana.org.au Return-Path: X-Original-To: patchwork-linux-crypto@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 791609FB96 for ; Thu, 12 May 2016 15:06:44 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 0DE752010B for ; Thu, 12 May 2016 15:06:41 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 4F2A520221 for ; Thu, 12 May 2016 15:06:34 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752571AbcELPGb (ORCPT ); Thu, 12 May 2016 11:06:31 -0400 Received: from mail-by2on0076.outbound.protection.outlook.com ([207.46.100.76]:18160 "EHLO na01-by2-obe.outbound.protection.outlook.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1752691AbcELPG3 (ORCPT ); Thu, 12 May 2016 11:06:29 -0400 Received: from DM2PR03CA0004.namprd03.prod.outlook.com (10.141.96.14) by CY1PR0301MB0603.namprd03.prod.outlook.com (10.160.142.22) with Microsoft SMTP Server (TLS) id 15.1.485.9; Thu, 12 May 2016 15:06:27 +0000 Received: from BL2FFO11FD045.protection.gbl (2a01:111:f400:7c09::169) by DM2PR03CA0004.outlook.office365.com (2a01:111:e400:2428::14) with Microsoft SMTP Server (TLS) id 15.1.492.11 via Frontend Transport; Thu, 12 May 2016 15:06:27 +0000 Authentication-Results: spf=fail (sender IP is 192.88.158.2) smtp.mailfrom=nxp.com; nxp.com; dkim=none (message not signed) header.d=none;nxp.com; dmarc=none action=none header.from=nxp.com; Received-SPF: Fail (protection.outlook.com: domain of nxp.com does not designate 192.88.158.2 as permitted sender) receiver=protection.outlook.com; client-ip=192.88.158.2; helo=az84smr01.freescale.net; Received: from az84smr01.freescale.net (192.88.158.2) by BL2FFO11FD045.mail.protection.outlook.com (10.173.161.207) with Microsoft SMTP Server (TLS) id 15.1.492.8 via Frontend Transport; Thu, 12 May 2016 15:06:26 +0000 Received: from enigma.ea.freescale.net (enigma.ea.freescale.net [10.171.77.120]) by az84smr01.freescale.net (8.14.3/8.14.0) with ESMTP id u4CF6Kn2007042; Thu, 12 May 2016 08:06:25 -0700 From: Tudor Ambarus To: CC: , Tudor Ambarus Subject: [PATCH 3/3] crypto: caam - add support for RSA algorithm Date: Thu, 12 May 2016 18:06:18 +0300 Message-ID: <1463065578-14017-4-git-send-email-tudor-dan.ambarus@nxp.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1463065578-14017-1-git-send-email-tudor-dan.ambarus@nxp.com> References: <1463065578-14017-1-git-send-email-tudor-dan.ambarus@nxp.com> X-EOPAttributedMessage: 0 X-Matching-Connectors: 131075391868760165; (91ab9b29-cfa4-454e-5278-08d120cd25b8); () X-Forefront-Antispam-Report: CIP:192.88.158.2; IPV:NLI; CTRY:US; EFV:NLI; SFV:NSPM; SFS:(10009020)(6009001)(2980300002)(1110001)(1109001)(339900001)(199003)(189002)(9170700003)(2950100001)(189998001)(50986999)(6806005)(104016004)(76176999)(105606002)(5008740100001)(33646002)(106466001)(229853001)(2351001)(5003940100001)(85426001)(110136002)(1220700001)(36756003)(47776003)(11100500001)(92566002)(50226002)(81166006)(2906002)(48376002)(586003)(77096005)(19580405001)(87936001)(8936002)(19580395003)(50466002)(575784001)(86362001)(7059030)(4720700001); DIR:OUT; SFP:1101; SCL:1; SRVR:CY1PR0301MB0603; H:az84smr01.freescale.net; FPR:; SPF:Fail; MLV:sfv; A:1; MX:1; LANG:en; X-Microsoft-Exchange-Diagnostics: 1; BL2FFO11FD045; 1:AgKezmPTgigEMHhQrrB3ItcuizOqHtG1JQME6TZ3Axw/gKStie4XPNNshxZ/3QMS4lH17J7hIZVmg/kRw7OeTpBBJEGUzOUtqxxLzdVBI7Gm13dnBif4YJDVYHZO2A+Z6pEjyX3OVWp7VA1i3S5RLcaH5OLtxkpAMiSYunbgqZyI/HUMJs3to5T9pc5xZ/rKXpO80Q2Z56/fBFRmJ3pxef+R0mSW/zVYovlGgRLIzyESiDE7RLt6KHnTqGEm9jnt9b1VJ+QKD5vQNjxBmGRpnUhi3Gt3tZX82FoJ1Fr9sblC6iK2YDEvX6eMLDw/K5A+R/iwz7YPyRpv+yp+QiPJDaRUDbIcITRrBqdzgjouoTOAp5sM9FEUt1M1WDLTJx3a01JO3gmUVY9LfEb+PBXoZK3T6h/XzsIn4SL2LtdyHavKYSZpz3+hcBF7BPewEgSxbaiP8Lnnykjmo2g0GBSgW7+sxYfyufxxOWEHTXkRNNsexwD5kQem4rdfz73ONWYRtFjaf2cN9ZS4syXZVPpbt6Dp+QYUJzgH09XTPpSOay8FCOK7UZec3VGN59vgDuj4ND58ATWbEkXQwGsj4U8FcTZ/e7fDwVjUXrBNM4qYiwcZGZ0X37lMTgssWnw4DWdL4YGR3gP9qc9RN4x3UbMFeBHtA0F/EDAeUoApO4N6wC+GX1V2R4ho90ADOyPXYDaZs0i3GWhyvNhEgaJZ+Wqspg== MIME-Version: 1.0 X-MS-Office365-Filtering-Correlation-Id: 15022264-bc21-4788-2dad-08d37a76fd94 X-Microsoft-Exchange-Diagnostics: 1; CY1PR0301MB0603; 2:mHPVfSqd1n4VM+OcZkccdal4it3o9DorVR2If5b7Ms9ms7DAtRmOsxNH/kYEfehqfdSKciYhwWt+R9zUM2PzDKPf5ZUewp91nu7uLNkSj9qlWK/MwK/WKnBUsBvHyZ2Oc8PaYDHN0qHhxsvol/X7cFrFqby6iS4eFGNV4IGwNni7KTrvAkf08ZCAPhns4QRG; 3:7Ao6XzOwrDxx9FaIThrWVnHCvXdjcWMIU4NPHrW9g7EGm/A+ecyC5FU3Rg63YW7KynLaKwyjoEHpOEz2guqNDnBY+kDT6RbXA9y5HzgHON/5+OtrjylxHSOVuCDjuqZVflm5n6pvbOe3nB0ZnscfmTzI7gwEr9FUEM3aAWVNSbb/16KP6hPKXI2F8oTxdaOiCmdTS5xNBIJnw00DdVN/Np8KftjKBpuzJ4othm54dJs= X-Microsoft-Antispam: UriScan:;BCL:0;PCL:0;RULEID:;SRVR:CY1PR0301MB0603; X-Microsoft-Exchange-Diagnostics: 1; CY1PR0301MB0603; 25:8b7C82Yr7kZQPn1C2Zkyp+6ScWfhZCxQleIrtmY+ibX+PzSzv/qvdi++B/nWE00M1+Bo3MsylMdKe5jxzpaYUyyzoQfrFlrF8980SU7W+PIYI+GDPBBJOXTBZIW3o87qECMUajGokJxtsVMPHfHU2JYzpqvfL4vWE2ZWoexsrao1TWEzCGMSgc3eXOWG4woSaUp4shb2Y7ATMvvFoAoWqbRqLGUBq2bbWG1IvKXInkj4dKLamS68q+ISsfoavTe3PeEpJsc/IQy6zeSiBM+pQqmRb7zNUhexOt6SiRy53ceDc6RerifKQMA2Zhp1oKa+mt048scmOYpdAMp7vduYFzTsEaHrbQBHvZfmxIUWkJFJ9vfTmDNitZdEKj7BQ2ZehP4xR9V/GTx14noSCz01KuxvRr/rZiup/VYCgSDWw68XFeL+aBJ6BCeWfC4zRFYk+EfFxCbiikOWg8my4RcCuyx2hpZhAumRD/hk3Siyw52M6TzNvroFX5Jewxb5SlnMthmsWeWSMXk0J9ObR2Fahn3B4C5IZmJclDbZ7hOI+bGWvDlcriqlsi3elgXV4Xssi7dpYJGDcLa2ik5j8G2WfSyUaNFtOUt5Q80JbKBIBeRvNpuVzr9aSvgLKq2mkJGQWVX5k8Sb6oJquQRWJ5gEM5+KeELNFDejZogdiZkcnStoWyNM6ydbq0fG6R3T1F11BRS0r1QsgxCStMvWGxzhi+j4uhL1MNiLqvoEAmWMQu16+fmeruEjR0Y/IFbep13t X-Microsoft-Antispam-PRVS: X-Exchange-Antispam-Report-Test: UriScan:; X-Exchange-Antispam-Report-CFA-Test: BCL:0; PCL:0; RULEID:(601004)(2401047)(8121501046)(5005006)(13018025)(13017025)(13023025)(13024025)(13015025)(10201501046)(3002001)(6055026); SRVR:CY1PR0301MB0603; BCL:0; PCL:0; RULEID:(400006); SRVR:CY1PR0301MB0603; X-Microsoft-Exchange-Diagnostics: 1; CY1PR0301MB0603; 4:+q0UteNNOG1GcNJEJv8asaXSz+tw2yjDt6VmvRhxQD6nhS49Wr5hpX2JWeO6D0gmNOoxVNTyDb8n8MaImYazhdebHXKlUDgFL+UgSA/FUBYArWTgI80VuFKufIuJV5/XNB2/1bYiV6myCG5qIw5KyxDbvh1z4tugf80zLRmNAlLmveSy9PgqWC5Moa21QYRBsKmiKo42F2Mqj68S6DIbbCt6Ag9AdFRa08X2VsLlv13FIzWFBXmfTEJr/3C5TjrcQ2+OTyv+DMC4gjtQRxPaiYfSphTNiLXqT/ZLeXRB9c2cTqo+2CIbIO+ypqx5Nki0lK20e8cGQEV4GU2l0SpkJZc6+X5xzq0e1ynQvBKzpPcQgkOvxG1IyejsrfmdLzvQruiyyPmyzcs/p4A2Lv286ZC6t4gYqo4l/RTiMykpE4Z25eggGXx6pzF6HPuVpiAmajpVYk/HmgjoRXzl++NbbdUPslzXb7O8HmpgsX/yins= X-Forefront-PRVS: 0940A19703 X-Microsoft-Exchange-Diagnostics: =?us-ascii?Q?1; CY1PR0301MB0603; 23:qujg2/aUDaVxx8W5a8LdRPvjrs6XILpCkyEAfua?= =?us-ascii?Q?7KSfs1wi4mGGMWA8Zf4FQgSNhN966On+S5w6NFb8MZg3W4Mk3cepYRY06yAj?= =?us-ascii?Q?oQpTNEikqNyBSxY4WUfkXa4A8fooQ5Z6wJ4j/7r/3IgX7MldSrMjXuI4MUI7?= =?us-ascii?Q?V9SZcql9FgsEfqTA6l2uc0934hEoBMVqfPfXkE3c+kf8UnQziPuwFiMfRYYz?= =?us-ascii?Q?xwy7fNR0jsAL3CKKoIk7U8aUqsrUnU0rIhITweGc8jiNBcBKs/TygvXw55dW?= =?us-ascii?Q?MVcKmTU3nfOSjiYkx5XO3zUu/BfjGM/T2Yv95CPl+N4xRxqDk8UrdooiE9yP?= =?us-ascii?Q?nrRzrcDAcf+grI78WVi4Zmr8kfsobsyvn6fJYz1BfxIJ8ZOk8KOkVlRax5JB?= =?us-ascii?Q?QTxI9+Jr2Ojg8YF3Y0ekFdYn63BT6w+4i7qO8kPXvuWnYaLjC65ZAvt95mOA?= =?us-ascii?Q?nExffQuM+pVRmUkttG8EZ2SM+2eus+/+q+L6gpwjUfBKX9XBMm1lk6b3U2f7?= =?us-ascii?Q?N86aPyxPiHT9myBtRiy7vJb22xvMWceeoFCMBkVlpRITvTBFMnfIG+kfoU/n?= =?us-ascii?Q?4RF/VZa4jZvxh9lEZu1HbtHAeV1rtMs/LNSwdkQhAWDqTeqY6/H/yTfCxC3N?= =?us-ascii?Q?YdZulWipQdWr5zsr+bAxlPc1aJ0rVbtfb8xoLqDUpY0lAUKlFSe8SjlVHSYy?= =?us-ascii?Q?bPadsbOeAk0O1eXEtL6F2JYhe5INcnMVsT1GUbcQPkm1v2bLO6Z14d3mAbiF?= =?us-ascii?Q?31UCTmfKDMHzqMO8veeGQB+QQ/c/mDRvD62B+gJWzi9vLeGeVOsvSMFnbBIi?= =?us-ascii?Q?tk/ts7RwVJQAv/F4rHr9RGHiDjoyLOjNUZDmgdHwAp4p9kZqp9+27HaJ4kN1?= =?us-ascii?Q?S9pNs8yqKplmsxeaQUvv0lajAAWf7vfVFA0RqBQ8WOma7Z1F3KI9XhJM0uLt?= =?us-ascii?Q?PirlGKcyVoqFdx3I4lqnH6FUliROdnqnO+dDwozQEIpTmSYpYaDAIumNigey?= =?us-ascii?Q?yDiwzoo1nJ6Cx63AjoOGi6E8Qnu5T30vscH0zzYwZ6eNgUtL5cSWpFicjnaR?= =?us-ascii?Q?E8AoYiszKZzZjaoLv9BXJ+O4YavhXcFZ27yhHkTfNcJ6lWf574Uz6L7otmrW?= =?us-ascii?Q?12PqzBX80oHY=3D?= X-Microsoft-Exchange-Diagnostics: 1; CY1PR0301MB0603; 5:EYXD4d5zN6Kzx+Lo9q8Alu4YFBKMqqiG9lyyJ7EcwTBOMl/uvHFYBNIizVWm9WOBndZqAi27apWkaUv29/4OkKtSEjRNp8E6yPBaQqcLODLm+LvfLs2AyIfIWXJ+79fpLq0gCKq4QEEmxm1R55uq2W/+2CiKtbA1ql1F8Sl0Kyo=; 24:Nsm3H8rsBmXNUpmUgMtPiSGol8Yu9tSGeYlbkca7DoCFNFaSQ3naAC2mNuCHWlo9h1DnXiQgB8g6HU5E0993HNHTaPa9wy6OSOaa8GQtsA8=; 7:VWudbZErONUGMsEvujS8Ms4lxtbzrBk+rUMyPC4JysQvmBhl4MpvNquGDZdFc9Ly5nlWUgb292M2oBKdNGyOMFUDdOZVGOU89hIcNwSpVeW/Q57MKOtNESeLKjtV6iVUZ4g1RFoW6XhrqnC5ISNgANJhPaWuvoaXlL1gz8bI49nNuAVu9qmmM65T9lNUxQXX SpamDiagnosticOutput: 1:23 SpamDiagnosticMetadata: NSPM X-MS-Exchange-CrossTenant-OriginalArrivalTime: 12 May 2016 15:06:26.6108 (UTC) X-MS-Exchange-CrossTenant-Id: 5afe0b00-7697-4969-b663-5eab37d5f47e X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=5afe0b00-7697-4969-b663-5eab37d5f47e; Ip=[192.88.158.2]; Helo=[az84smr01.freescale.net] X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: CY1PR0301MB0603 Sender: linux-crypto-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-crypto@vger.kernel.org X-Spam-Status: No, score=-8.3 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=ham version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Add RSA support to caam driver. Coauthored-by: Yashpal Dutta Signed-off-by: Tudor Ambarus --- drivers/crypto/caam/Kconfig | 12 ++ drivers/crypto/caam/Makefile | 4 + drivers/crypto/caam/caampkc.c | 466 +++++++++++++++++++++++++++++++++++++++++ drivers/crypto/caam/caampkc.h | 94 +++++++++ drivers/crypto/caam/desc.h | 2 + drivers/crypto/caam/pdb.h | 16 +- drivers/crypto/caam/pkc_desc.c | 138 ++++++++++++ 7 files changed, 731 insertions(+), 1 deletion(-) create mode 100644 drivers/crypto/caam/caampkc.c create mode 100644 drivers/crypto/caam/caampkc.h create mode 100644 drivers/crypto/caam/pkc_desc.c diff --git a/drivers/crypto/caam/Kconfig b/drivers/crypto/caam/Kconfig index 5652a53..44449ba 100644 --- a/drivers/crypto/caam/Kconfig +++ b/drivers/crypto/caam/Kconfig @@ -99,6 +99,18 @@ config CRYPTO_DEV_FSL_CAAM_AHASH_API To compile this as a module, choose M here: the module will be called caamhash. +config CRYPTO_DEV_FSL_CAAM_PKC_API + tristate "Register public key cryptography implementations with Crypto API" + depends on CRYPTO_DEV_FSL_CAAM && CRYPTO_DEV_FSL_CAAM_JR + default y + select CRYPTO_RSA + help + Selecting this will allow SEC Public key support for RSA. + Supported cryptographic primitives: encryption, decryption, + signature and verification. + To compile this as a module, choose M here: the module + will be called caam_pkc. + config CRYPTO_DEV_FSL_CAAM_RNG_API tristate "Register caam device for hwrng API" depends on CRYPTO_DEV_FSL_CAAM && CRYPTO_DEV_FSL_CAAM_JR diff --git a/drivers/crypto/caam/Makefile b/drivers/crypto/caam/Makefile index 550758a..399ad55 100644 --- a/drivers/crypto/caam/Makefile +++ b/drivers/crypto/caam/Makefile @@ -5,11 +5,15 @@ ifeq ($(CONFIG_CRYPTO_DEV_FSL_CAAM_DEBUG), y) EXTRA_CFLAGS := -DDEBUG endif +ccflags-y += -I$(srctree)/crypto + obj-$(CONFIG_CRYPTO_DEV_FSL_CAAM) += caam.o obj-$(CONFIG_CRYPTO_DEV_FSL_CAAM_JR) += caam_jr.o obj-$(CONFIG_CRYPTO_DEV_FSL_CAAM_CRYPTO_API) += caamalg.o obj-$(CONFIG_CRYPTO_DEV_FSL_CAAM_AHASH_API) += caamhash.o obj-$(CONFIG_CRYPTO_DEV_FSL_CAAM_RNG_API) += caamrng.o +obj-$(CONFIG_CRYPTO_DEV_FSL_CAAM_PKC_API) += caam_pkc.o caam-objs := ctrl.o caam_jr-objs := jr.o key_gen.o error.o +caam_pkc-y := caampkc.o pkc_desc.o diff --git a/drivers/crypto/caam/caampkc.c b/drivers/crypto/caam/caampkc.c new file mode 100644 index 0000000..34ffa87 --- /dev/null +++ b/drivers/crypto/caam/caampkc.c @@ -0,0 +1,466 @@ +/* + * caam - Freescale FSL CAAM support for Public Key Cryptography + * + * Copyright 2016 Freescale Semiconductor, Inc. + * + * There is no Shared Descriptor for PKC so that the Job Descriptor must carry + * all the desired key parameters, input and output pointers. + */ +#include +#include +#include "compat.h" +#include "caampkc.h" +#include "sg_sw_sec4.h" +#include "regs.h" +#include "intern.h" +#include "jr.h" +#include "error.h" + +static void rsa_io_unmap(struct device *dev, struct rsa_edesc *edesc, + struct akcipher_request *req) +{ + dma_unmap_sg(dev, req->dst, edesc->dst_nents, DMA_FROM_DEVICE); + dma_unmap_sg(dev, req->src, edesc->src_nents, DMA_TO_DEVICE); +} + +static void rsa_pub_unmap(struct device *dev, struct rsa_edesc *edesc, + struct akcipher_request *req) +{ + struct crypto_akcipher *tfm = crypto_akcipher_reqtfm(req); + struct caam_rsa_ctx *ctx = akcipher_tfm_ctx(tfm); + struct rsa_key *key = &ctx->key; + struct rsa_pub_desc *hw_desc = (struct rsa_pub_desc *)edesc->hw_desc; + + dma_unmap_single(dev, hw_desc->n_dma, key->n_sz, DMA_TO_DEVICE); + dma_unmap_single(dev, hw_desc->e_dma, key->e_sz, DMA_TO_DEVICE); +} + +static void rsa_priv_f1_unmap(struct device *dev, struct rsa_edesc *edesc, + struct akcipher_request *req) +{ + struct crypto_akcipher *tfm = crypto_akcipher_reqtfm(req); + struct caam_rsa_ctx *ctx = akcipher_tfm_ctx(tfm); + struct rsa_key *key = &ctx->key; + struct rsa_priv_f1_desc *hw_desc = + (struct rsa_priv_f1_desc *)edesc->hw_desc; + + dma_unmap_single(dev, hw_desc->n_dma, key->n_sz, DMA_TO_DEVICE); + dma_unmap_single(dev, hw_desc->d_dma, key->n_sz, DMA_TO_DEVICE); +} + +static size_t skip_to_nonzero(u8 *ptr, size_t nbytes) +{ + size_t nr_zeros = 0; + + while (!(*ptr) && nbytes) { + nbytes--; + ptr++; + nr_zeros++; + } + + return nr_zeros; +} + +static size_t scatterwalk_skip_zeros(struct scatter_walk *walk, size_t nbytes) +{ + size_t len_this_page, nr_zeros, cnt = 0; + u8 *vaddr, *ptr; + + for (;;) { + nr_zeros = 0; + len_this_page = scatterwalk_pagelen(walk); + + if (len_this_page > nbytes) + len_this_page = nbytes; + + vaddr = scatterwalk_map(walk); + ptr = vaddr; + nr_zeros = skip_to_nonzero(ptr, len_this_page); + scatterwalk_unmap(vaddr); + + /* count total number of zeros */ + cnt += nr_zeros; + + /* advance scatterwalk to the nonzero data */ + scatterwalk_advance(walk, nr_zeros); + + if (nr_zeros < len_this_page || nbytes == len_this_page) + break; + + nbytes -= len_this_page; + + scatterwalk_pagedone(walk, 0, 1); + } + + return cnt; +} + +/* + * This function drops the leading zeros and copies the data to the initial + * pointer so that it can be freed later on. Returns the updated data length. + */ +static size_t drop_leading_zeros(struct scatterlist *sg, size_t nbytes) +{ + struct scatter_walk walk_src, walk_dst; + size_t nr_zeros = 0; + + scatterwalk_start(&walk_src, sg); + nr_zeros = scatterwalk_skip_zeros(&walk_src, nbytes); + + if (nr_zeros) { + nbytes = nbytes - nr_zeros; + + scatterwalk_start(&walk_dst, sg); + scatterwalk_sg_copychunks(&walk_dst, &walk_src, nbytes); + scatterwalk_done(&walk_dst, 0, 0); + } + + scatterwalk_done(&walk_src, 0, 0); + + return nbytes; +} + +/* RSA Job Completion handler */ +static void rsa_pub_done(struct device *dev, u32 *desc, u32 err, void *context) +{ + struct akcipher_request *req = context; + struct rsa_edesc *edesc; + + if (err) + caam_jr_strstatus(dev, err); + + /* + * RSA's output is expected to be a big integer. Drop the leading + * zeros since they are not meaningful in the world of numbers. + */ + req->dst_len = drop_leading_zeros(req->dst, req->dst_len); + + edesc = container_of(desc, struct rsa_edesc, hw_desc[0]); + + rsa_pub_unmap(dev, edesc, req); + rsa_io_unmap(dev, edesc, req); + kfree(edesc); + + akcipher_request_complete(req, err); +} + +static void rsa_priv_f1_done(struct device *dev, u32 *desc, u32 err, + void *context) +{ + struct akcipher_request *req = context; + struct rsa_edesc *edesc; + + if (err) + caam_jr_strstatus(dev, err); + + /* + * RSA's output is expected to be a big integer. Drop the leading + * zeros since they are not meaningful in the world of numbers. + */ + req->dst_len = drop_leading_zeros(req->dst, req->dst_len); + + edesc = container_of(desc, struct rsa_edesc, hw_desc[0]); + + rsa_priv_f1_unmap(dev, edesc, req); + rsa_io_unmap(dev, edesc, req); + kfree(edesc); + + akcipher_request_complete(req, err); +} + +static struct rsa_edesc *rsa_edesc_alloc(struct akcipher_request *req, + size_t desclen) +{ + struct crypto_akcipher *tfm = crypto_akcipher_reqtfm(req); + struct caam_rsa_ctx *ctx = akcipher_tfm_ctx(tfm); + struct device *dev = ctx->dev; + struct rsa_edesc *edesc; + gfp_t flags = (req->base.flags & (CRYPTO_TFM_REQ_MAY_BACKLOG | + CRYPTO_TFM_REQ_MAY_SLEEP)) ? GFP_KERNEL : GFP_ATOMIC; + int sgc; + int sec4_sg_index, sec4_sg_len = 0, sec4_sg_bytes; + int src_nents, dst_nents; + + src_nents = sg_nents_for_len(req->src, req->src_len); + dst_nents = sg_nents_for_len(req->dst, req->dst_len); + + if (src_nents > 1) + sec4_sg_len = src_nents; + if (dst_nents > 1) + sec4_sg_len += dst_nents; + + sec4_sg_bytes = sec4_sg_len * sizeof(struct sec4_sg_entry); + + /* allocate space for base edesc, hw desc commands and link tables */ + edesc = kzalloc(sizeof(*edesc) + desclen + sec4_sg_bytes, + GFP_DMA | flags); + if (!edesc) + return ERR_PTR(-ENOMEM); + + sgc = dma_map_sg(dev, req->src, src_nents, DMA_TO_DEVICE); + if (unlikely(!sgc)) { + dev_err(dev, "unable to map source\n"); + goto src_fail; + } + + sgc = dma_map_sg(dev, req->dst, dst_nents, DMA_FROM_DEVICE); + if (unlikely(!sgc)) { + dev_err(dev, "unable to map destination\n"); + goto dst_fail; + } + + edesc->sec4_sg = (void *)edesc + sizeof(*edesc) + desclen; + + sec4_sg_index = 0; + if (src_nents > 1) { + sg_to_sec4_sg_last(req->src, src_nents, edesc->sec4_sg, 0); + sec4_sg_index += src_nents; + } + if (dst_nents > 1) { + sg_to_sec4_sg_last(req->dst, dst_nents, + edesc->sec4_sg + sec4_sg_index, 0); + } + + /* Save nents for later use in Job Descriptor. */ + edesc->src_nents = src_nents; + edesc->dst_nents = dst_nents; + + if (!sec4_sg_bytes) + return edesc; + + edesc->sec4_sg_dma = dma_map_single(dev, edesc->sec4_sg, + sec4_sg_bytes, DMA_TO_DEVICE); + if (dma_mapping_error(dev, edesc->sec4_sg_dma)) { + dev_err(dev, "unable to map S/G table\n"); + goto sec4_sg_fail; + } + + return edesc; + +sec4_sg_fail: + dma_unmap_sg(dev, req->dst, dst_nents, DMA_FROM_DEVICE); +dst_fail: + dma_unmap_sg(dev, req->src, src_nents, DMA_TO_DEVICE); +src_fail: + kfree(edesc); + return ERR_PTR(-ENOMEM); +} + +static int caam_rsa_enc(struct akcipher_request *req) +{ + struct crypto_akcipher *tfm = crypto_akcipher_reqtfm(req); + struct caam_rsa_ctx *ctx = akcipher_tfm_ctx(tfm); + struct rsa_key *key = &ctx->key; + struct device *jrdev = ctx->dev; + struct rsa_edesc *edesc = NULL; + size_t desclen = sizeof(struct rsa_pub_desc); + int ret; + + if (unlikely(!key->n || !key->e)) + return -EINVAL; + + if (req->dst_len < key->n_sz) { + req->dst_len = key->n_sz; + dev_err(jrdev, "Output buffer length less than parameter n\n"); + return -EOVERFLOW; + } + + /* Allocate extended descriptor. */ + edesc = rsa_edesc_alloc(req, desclen); + if (IS_ERR(edesc)) + return PTR_ERR(edesc); + + /* Initialize Job Descriptor. */ + ret = init_rsa_pub_desc(req, edesc); + if (ret) + goto init_fail; + + ret = caam_jr_enqueue(jrdev, edesc->hw_desc, rsa_pub_done, req); + if (!ret) + return -EINPROGRESS; + + rsa_pub_unmap(jrdev, edesc, req); + +init_fail: + rsa_io_unmap(jrdev, edesc, req); + kfree(edesc); + return ret; +} + +static int caam_rsa_dec(struct akcipher_request *req) +{ + struct crypto_akcipher *tfm = crypto_akcipher_reqtfm(req); + struct caam_rsa_ctx *ctx = akcipher_tfm_ctx(tfm); + struct rsa_key *key = &ctx->key; + struct device *jrdev = ctx->dev; + struct rsa_edesc *edesc = NULL; + size_t desclen = sizeof(struct rsa_priv_f1_desc); + int ret; + + if (unlikely(!key->n || !key->d)) + return -EINVAL; + + if (req->dst_len < key->n_sz) { + req->dst_len = key->n_sz; + return -EOVERFLOW; + } + + /* Allocate extended descriptor. */ + edesc = rsa_edesc_alloc(req, desclen); + if (IS_ERR(edesc)) + return PTR_ERR(edesc); + + /* Initialize Job Descriptor. */ + ret = init_rsa_priv_f1_desc(req, edesc); + if (ret) + goto init_fail; + + ret = caam_jr_enqueue(jrdev, edesc->hw_desc, rsa_priv_f1_done, req); + if (!ret) + return -EINPROGRESS; + + rsa_priv_f1_unmap(jrdev, edesc, req); + +init_fail: + rsa_io_unmap(jrdev, edesc, req); + kfree(edesc); + return ret; +} + +static int caam_rsa_set_pub_key(struct crypto_akcipher *tfm, const void *key, + unsigned int keylen) +{ + struct caam_rsa_ctx *ctx = akcipher_tfm_ctx(tfm); + struct rsa_key *rsa_key = &ctx->key; + + return rsa_parse_pub_key(rsa_key, key, keylen); +} + +static int caam_rsa_set_priv_key(struct crypto_akcipher *tfm, const void *key, + unsigned int keylen) +{ + struct caam_rsa_ctx *ctx = akcipher_tfm_ctx(tfm); + struct rsa_key *rsa_key = &ctx->key; + + return rsa_parse_priv_key(rsa_key, key, keylen); +} + +static int caam_rsa_max_size(struct crypto_akcipher *tfm) +{ + struct caam_rsa_ctx *ctx = akcipher_tfm_ctx(tfm); + struct rsa_key *key = &ctx->key; + + return (key->n) ? key->n_sz : -EINVAL; +} + +/* Per session pkc's driver context creation function */ +static int caam_rsa_init_tfm(struct crypto_akcipher *tfm) +{ + struct caam_rsa_ctx *ctx = akcipher_tfm_ctx(tfm); + struct rsa_key *key = &ctx->key; + + ctx->dev = caam_jr_alloc(); + + if (IS_ERR(ctx->dev)) { + dev_err(ctx->dev, "Job Ring Device allocation for transform failed\n"); + return PTR_ERR(ctx->dev); + } + + key->flags = GFP_DMA | GFP_KERNEL; + return 0; +} + +/* Per session pkc's driver context cleanup function */ +static void caam_rsa_exit_tfm(struct crypto_akcipher *tfm) +{ + struct caam_rsa_ctx *ctx = akcipher_tfm_ctx(tfm); + struct rsa_key *key = &ctx->key; + + rsa_free_key(key); + caam_jr_free(ctx->dev); +} + +static struct akcipher_alg caam_rsa = { + .encrypt = caam_rsa_enc, + .decrypt = caam_rsa_dec, + .sign = caam_rsa_dec, + .verify = caam_rsa_enc, + .set_pub_key = caam_rsa_set_pub_key, + .set_priv_key = caam_rsa_set_priv_key, + .max_size = caam_rsa_max_size, + .init = caam_rsa_init_tfm, + .exit = caam_rsa_exit_tfm, + .base = { + .cra_name = "rsa", + .cra_driver_name = "rsa-caam", + .cra_priority = 3000, + .cra_module = THIS_MODULE, + .cra_alignmask = 0, + .cra_ctxsize = sizeof(struct caam_rsa_ctx), + }, +}; + +/* Public Key Cryptography module initialization handler */ +static int __init caam_pkc_init(void) +{ + struct device_node *dev_node; + struct platform_device *pdev; + struct device *ctrldev; + struct caam_drv_private *priv; + u32 cha_inst, pk_inst; + int err = 0; + + dev_node = of_find_compatible_node(NULL, NULL, "fsl,sec-v4.0"); + if (!dev_node) { + dev_node = of_find_compatible_node(NULL, NULL, "fsl,sec4.0"); + if (!dev_node) + return -ENODEV; + } + + pdev = of_find_device_by_node(dev_node); + if (!pdev) { + of_node_put(dev_node); + return -ENODEV; + } + + ctrldev = &pdev->dev; + priv = dev_get_drvdata(ctrldev); + of_node_put(dev_node); + + /* + * If priv is NULL, it's probably because the caam driver wasn't + * properly initialized (e.g. RNG4 init failed). Thus, bail out here. + */ + if (!priv) + return -ENODEV; + + /* Determine public key hardware accelerator presence. */ + cha_inst = rd_reg32(&priv->ctrl->perfmon.cha_num_ls); + pk_inst = (cha_inst & CHA_ID_LS_PK_MASK) >> CHA_ID_LS_PK_SHIFT; + + /* Do not register algorithms if PKHA is not present. */ + if (!pk_inst) + return -ENODEV; + + caam_rsa.base.cra_flags = 0; + err = crypto_register_akcipher(&caam_rsa); + if (err) + dev_warn(ctrldev, "%s alg registration failed\n", + caam_rsa.base.cra_driver_name); + else + dev_info(ctrldev, "caam algorithms registered in /proc/crypto\n"); + + return err; +} + +static void __exit caam_pkc_exit(void) +{ + crypto_unregister_akcipher(&caam_rsa); +} + +module_init(caam_pkc_init); +module_exit(caam_pkc_exit); + +MODULE_LICENSE("Dual BSD/GPL"); +MODULE_DESCRIPTION("FSL CAAM support for PKC functions of crypto API"); +MODULE_AUTHOR("Freescale Semiconductor"); diff --git a/drivers/crypto/caam/caampkc.h b/drivers/crypto/caam/caampkc.h new file mode 100644 index 0000000..398a881 --- /dev/null +++ b/drivers/crypto/caam/caampkc.h @@ -0,0 +1,94 @@ +/* + * caam - Freescale FSL CAAM support for Public Key Cryptography descriptors + * + * Copyright 2016 Freescale Semiconductor, Inc. + * + * There is no Shared Descriptor for PKC so that the Job Descriptor must carry + * all the desired key parameters, input and output pointers. + */ + +#ifndef _PKC_DESC_H_ +#define _PKC_DESC_H_ + +#include +#include +#include +#include "desc_constr.h" +#include "pdb.h" +#include "rsapubkey-asn1.h" +#include "rsaprivkey-asn1.h" + +/** + * caam_rsa_ctx - per session context. + * @key: RSA key structure + * @dev: device structure + */ +struct caam_rsa_ctx { + struct rsa_key key; + struct device *dev; +}; + +/** + * RSA Pub_Key Descriptor + * @desc_hdr: Job Descriptor Header command + * @sgf: scatter-gather field + * @f_dma: dma address of input data + * @g_dma: dma address of ecrypted output data + * @n_dma: dma address of RSA public exponent + * @dma_e: dma address of RSA public exponent + * @f_len: length in octets of the input data + * @op: RSA Operation command + */ +struct rsa_pub_desc { + u32 desc_hdr; + u32 sgf; + dma_addr_t f_dma; + dma_addr_t g_dma; + dma_addr_t n_dma; + dma_addr_t e_dma; + u32 f_len; + u32 op; +} __packed; + +/** + * Form1 Priv_key Decryption Descriptor. + * Private key is represented by (n,d). + * @desc_hdr: Job Descriptor Header command + * @sgf: scatter-gather field + * @g_dma: dma address of ecrypted input data + * @f_dma: dma address of output data + * @n_dma: dma address of RSA public exponent + * @dma_d: dma address of RSA private exponent + * @op: RSA Operation command + */ +struct rsa_priv_f1_desc { + u32 desc_hdr; + u32 sgf; + dma_addr_t g_dma; + dma_addr_t f_dma; + dma_addr_t n_dma; + dma_addr_t d_dma; + u32 op; +} __packed; + +/** + * rsa_edesc - s/w-extended rsa descriptor + * @src_nents: number of segments in input scatterlist + * @dst_nents: number of segments in output scatterlist + * @sec4_sg_dma: dma address of h/w link table + * @sec4_sg: pointer to h/w link table + * @hw_desc: descriptor followed by link tables if any + */ +struct rsa_edesc { + int src_nents; + int dst_nents; + dma_addr_t sec4_sg_dma; + struct sec4_sg_entry *sec4_sg; + u32 hw_desc[]; +}; + +/* Descriptor construction primitives. */ +int init_rsa_pub_desc(struct akcipher_request *req, struct rsa_edesc *edesc); +int init_rsa_priv_f1_desc(struct akcipher_request *req, + struct rsa_edesc *edesc); +#endif diff --git a/drivers/crypto/caam/desc.h b/drivers/crypto/caam/desc.h index 1e93c6a..7e5c027 100644 --- a/drivers/crypto/caam/desc.h +++ b/drivers/crypto/caam/desc.h @@ -454,6 +454,8 @@ struct sec4_sg_entry { #define OP_PCLID_PUBLICKEYPAIR (0x14 << OP_PCLID_SHIFT) #define OP_PCLID_DSASIGN (0x15 << OP_PCLID_SHIFT) #define OP_PCLID_DSAVERIFY (0x16 << OP_PCLID_SHIFT) +#define OP_PCLID_RSAENC_PUBKEY (0x18 << OP_PCLID_SHIFT) +#define OP_PCLID_RSADEC_PRVKEY (0x19 << OP_PCLID_SHIFT) /* Assuming OP_TYPE = OP_TYPE_DECAP_PROTOCOL/ENCAP_PROTOCOL */ #define OP_PCLID_IPSEC (0x01 << OP_PCLID_SHIFT) diff --git a/drivers/crypto/caam/pdb.h b/drivers/crypto/caam/pdb.h index 3a87c0c..1c68d7b 100644 --- a/drivers/crypto/caam/pdb.h +++ b/drivers/crypto/caam/pdb.h @@ -1,7 +1,7 @@ /* * CAAM Protocol Data Block (PDB) definition header file * - * Copyright 2008-2012 Freescale Semiconductor, Inc. + * Copyright 2008-2016 Freescale Semiconductor, Inc. * */ @@ -399,4 +399,18 @@ struct dsa_verify_pdb { u8 *ab; /* only used if ECC processing */ }; +/* RSA Protocol Data Block */ +#define RSA_PDB_SGF_SHIFT 28 +#define RSA_PDB_E_SHIFT 12 +#define RSA_PDB_E_MASK (0xFFF << RSA_PDB_E_SHIFT) +#define RSA_PDB_D_SHIFT 12 +#define RSA_PDB_D_MASK (0xFFF << RSA_PDB_D_SHIFT) + +#define RSA_PDB_SGF_F (0x8 << RSA_PDB_SGF_SHIFT) +#define RSA_PDB_SGF_G (0x4 << RSA_PDB_SGF_SHIFT) +#define RSA_PRIV_PDB_SGF_F (0x4 << RSA_PDB_SGF_SHIFT) +#define RSA_PRIV_PDB_SGF_G (0x8 << RSA_PDB_SGF_SHIFT) + +#define RSA_PRIV_KEY_FRM_1 0 + #endif diff --git a/drivers/crypto/caam/pkc_desc.c b/drivers/crypto/caam/pkc_desc.c new file mode 100644 index 0000000..25c0690 --- /dev/null +++ b/drivers/crypto/caam/pkc_desc.c @@ -0,0 +1,138 @@ +/* + * caam - Freescale FSL CAAM support for Public Key Cryptography descriptors + * + * Copyright 2016 Freescale Semiconductor, Inc. + * + * There is no Shared Descriptor for PKC so that the Job Descriptor must carry + * all the desired key parameters, input and output pointers. + */ +#include "caampkc.h" + +/* Descriptor for RSA Public operation */ +int init_rsa_pub_desc(struct akcipher_request *req, struct rsa_edesc *edesc) +{ + struct crypto_akcipher *tfm = crypto_akcipher_reqtfm(req); + struct caam_rsa_ctx *ctx = akcipher_tfm_ctx(tfm); + struct rsa_key *key = &ctx->key; + struct device *dev = ctx->dev; + struct rsa_pub_desc *desc = (struct rsa_pub_desc *)edesc->hw_desc; + u32 start_idx, desc_size; + int sec4_sg_index = 0; + + /* + * The PDB has static fields and can be initialized before writing + * a specific command. Map the memory first, since it can be a point + * of failure. + */ + desc->n_dma = dma_map_single(dev, key->n, key->n_sz, DMA_TO_DEVICE); + if (dma_mapping_error(dev, desc->n_dma)) { + dev_err(dev, "Unable to map modulus memory\n"); + goto n_fail; + } + + desc->e_dma = dma_map_single(dev, key->e, key->e_sz, DMA_TO_DEVICE); + if (dma_mapping_error(dev, desc->e_dma)) { + dev_err(dev, "Unable to map exponent memory\n"); + goto e_fail; + } + + desc_size = sizeof(*desc) / CAAM_CMD_SZ; + start_idx = (desc_size - 1) & HDR_START_IDX_MASK; + init_job_desc(edesc->hw_desc, (start_idx << HDR_START_IDX_SHIFT) | + (start_idx & HDR_DESCLEN_MASK) | HDR_ONE); + + sec4_sg_index = 0; + if (edesc->src_nents > 1) { + desc->sgf |= RSA_PDB_SGF_F; + desc->f_dma = edesc->sec4_sg_dma; + sec4_sg_index += edesc->src_nents; + } else { + desc->f_dma = sg_dma_address(req->src); + } + + if (edesc->dst_nents > 1) { + desc->sgf |= RSA_PDB_SGF_G; + desc->g_dma = edesc->sec4_sg_dma + + sec4_sg_index * sizeof(struct sec4_sg_entry); + } else { + desc->g_dma = sg_dma_address(req->dst); + } + + desc->sgf |= (key->e_sz << RSA_PDB_E_SHIFT) | key->n_sz; + desc->f_len = req->src_len; + desc->op = CMD_OPERATION | OP_TYPE_UNI_PROTOCOL | + OP_PCLID_RSAENC_PUBKEY; + return 0; + +e_fail: + dma_unmap_single(dev, desc->n_dma, key->n_sz, DMA_TO_DEVICE); +n_fail: + dma_unmap_sg(dev, req->dst, edesc->dst_nents, DMA_FROM_DEVICE); + dma_unmap_sg(dev, req->src, edesc->src_nents, DMA_TO_DEVICE); + kfree(edesc); + return -ENOMEM; +} + +/* Descriptor for RSA Private operation */ +int init_rsa_priv_f1_desc(struct akcipher_request *req, struct rsa_edesc *edesc) +{ + struct crypto_akcipher *tfm = crypto_akcipher_reqtfm(req); + struct caam_rsa_ctx *ctx = akcipher_tfm_ctx(tfm); + struct rsa_key *key = &ctx->key; + struct device *dev = ctx->dev; + struct rsa_priv_f1_desc *desc = + (struct rsa_priv_f1_desc *)edesc->hw_desc; + int sec4_sg_index = 0; + u32 start_idx, desc_size; + + /* + * The PDB has static fields and can be initialized before writing + * a specific command. Map the memory first, since it can be a point + * of failure. + */ + desc->n_dma = dma_map_single(dev, key->n, key->n_sz, DMA_TO_DEVICE); + if (dma_mapping_error(dev, desc->n_dma)) { + dev_err(dev, "Unable to map modulus memory\n"); + goto n_fail; + } + + desc->d_dma = dma_map_single(dev, key->d, key->n_sz, DMA_TO_DEVICE); + if (dma_mapping_error(dev, desc->d_dma)) { + dev_err(dev, "Unable to map exponent memory\n"); + goto d_fail; + } + + desc_size = sizeof(*desc) / CAAM_CMD_SZ; + start_idx = (desc_size - 1) & HDR_START_IDX_MASK; + init_job_desc(edesc->hw_desc, (start_idx << HDR_START_IDX_SHIFT) | + (start_idx & HDR_DESCLEN_MASK) | HDR_ONE); + + if (edesc->src_nents > 1) { + desc->sgf |= RSA_PRIV_PDB_SGF_G; + desc->g_dma = edesc->sec4_sg_dma; + sec4_sg_index += edesc->src_nents; + } else { + desc->g_dma = sg_dma_address(req->src); + } + + if (edesc->dst_nents > 1) { + desc->sgf |= RSA_PRIV_PDB_SGF_F; + desc->f_dma = edesc->sec4_sg_dma + + sec4_sg_index * sizeof(struct sec4_sg_entry); + } else { + desc->f_dma = sg_dma_address(req->dst); + } + + desc->sgf |= (key->n_sz << RSA_PDB_D_SHIFT) | key->n_sz; + desc->op = CMD_OPERATION | OP_TYPE_UNI_PROTOCOL | + OP_PCLID_RSADEC_PRVKEY | RSA_PRIV_KEY_FRM_1; + return 0; + +d_fail: + dma_unmap_single(dev, desc->n_dma, key->n_sz, DMA_TO_DEVICE); +n_fail: + dma_unmap_sg(dev, req->dst, edesc->dst_nents, DMA_FROM_DEVICE); + dma_unmap_sg(dev, req->src, edesc->src_nents, DMA_TO_DEVICE); + kfree(edesc); + return -ENOMEM; +}