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Thu, 2 Mar 2017 15:15:05 +0000 Subject: [RFC PATCH v2 13/32] KVM: SVM: Enable SEV by setting the SEV_ENABLE CPU feature From: Brijesh Singh To: , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , Date: Thu, 2 Mar 2017 10:15:01 -0500 Message-ID: <148846770159.2349.16863375000963463500.stgit@brijesh-build-machine> In-Reply-To: <148846752022.2349.13667498174822419498.stgit@brijesh-build-machine> References: <148846752022.2349.13667498174822419498.stgit@brijesh-build-machine> User-Agent: StGit/0.17.1-dirty MIME-Version: 1.0 X-Originating-IP: [165.204.77.1] X-ClientProxiedBy: CY4PR2201CA0007.namprd22.prod.outlook.com (10.171.208.145) To BN6PR12MB1602.namprd12.prod.outlook.com (10.172.20.151) X-MS-Office365-Filtering-Correlation-Id: b2e6e1e1-a915-4e6c-9096-08d4617eeadf X-MS-Office365-Filtering-HT: Tenant X-Microsoft-Antispam: UriScan:; BCL:0; PCL:0; RULEID:(22001)(48565401081); SRVR:BN6PR12MB1602; X-Microsoft-Exchange-Diagnostics: 1; BN6PR12MB1602; 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20:UX2bMVQqGRt9/z0CSAOC8jdY2YOEZk9LFuNc2OcJeuqACC9Y4Zgx0QglpWcYDs9Ty8RcRBKQK+dA2NONlIiJjy3QwIhdkBNhaM+nO91fRdHYnA7jzX2mw0OJXre4gSp2Bwsnz30eOPGp/hF4rEujcU7HCOn2auz3NgBPcDJgjTQCcorrV3PHVb5d/Su7zkhOabPK52w/wpuQNinJ7cixL9JWEpxIIVWq2d6AMGJcXhw3cpFwNUUiTuam57Li3UH6 X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 02 Mar 2017 15:15:05.1775 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-Transport-CrossTenantHeadersStamped: BN6PR12MB1602 Sender: linux-crypto-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-crypto@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Tom Lendacky Modify the SVM cpuid update function to indicate if Secure Encrypted Virtualization (SEV) is active in the guest by setting the SEV KVM CPU features bit. SEV is active if Secure Memory Encryption is enabled in the host and the SEV_ENABLE bit of the VMCB is set. Signed-off-by: Tom Lendacky --- arch/x86/kvm/cpuid.c | 4 +++- arch/x86/kvm/svm.c | 18 ++++++++++++++++++ 2 files changed, 21 insertions(+), 1 deletion(-) diff --git a/arch/x86/kvm/cpuid.c b/arch/x86/kvm/cpuid.c index 1639de8..e0c40a8 100644 --- a/arch/x86/kvm/cpuid.c +++ b/arch/x86/kvm/cpuid.c @@ -601,7 +601,7 @@ static inline int __do_cpuid_ent(struct kvm_cpuid_entry2 *entry, u32 function, entry->edx = 0; break; case 0x80000000: - entry->eax = min(entry->eax, 0x8000001a); + entry->eax = min(entry->eax, 0x8000001f); break; case 0x80000001: entry->edx &= kvm_cpuid_8000_0001_edx_x86_features; @@ -634,6 +634,8 @@ static inline int __do_cpuid_ent(struct kvm_cpuid_entry2 *entry, u32 function, break; case 0x8000001d: break; + case 0x8000001f: + break; /*Add support for Centaur's CPUID instruction*/ case 0xC0000000: /*Just support up to 0xC0000004 now*/ diff --git a/arch/x86/kvm/svm.c b/arch/x86/kvm/svm.c index 75b0645..36d61ff 100644 --- a/arch/x86/kvm/svm.c +++ b/arch/x86/kvm/svm.c @@ -46,6 +46,7 @@ #include #include +#include #include "trace.h" #define __ex(x) __kvm_handle_fault_on_reboot(x) @@ -5005,10 +5006,27 @@ static void svm_cpuid_update(struct kvm_vcpu *vcpu) { struct vcpu_svm *svm = to_svm(vcpu); struct kvm_cpuid_entry2 *entry; + struct vmcb_control_area *ca = &svm->vmcb->control; + struct kvm_cpuid_entry2 *features, *sev_info; /* Update nrips enabled cache */ svm->nrips_enabled = !!guest_cpuid_has_nrips(&svm->vcpu); + /* Check for Secure Encrypted Virtualization support */ + features = kvm_find_cpuid_entry(vcpu, KVM_CPUID_FEATURES, 0); + if (!features) + return; + + sev_info = kvm_find_cpuid_entry(vcpu, 0x8000001f, 0); + if (!sev_info) + return; + + if (ca->nested_ctl & SVM_NESTED_CTL_SEV_ENABLE) { + features->eax |= (1 << KVM_FEATURE_SEV); + cpuid(0x8000001f, &sev_info->eax, &sev_info->ebx, + &sev_info->ecx, &sev_info->edx); + } + if (!kvm_vcpu_apicv_active(vcpu)) return;