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[2.15.84.64]) by smtp.googlemail.com with ESMTPSA id p196-v6sm7974367wmb.20.2018.06.14.12.39.29 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 14 Jun 2018 12:39:30 -0700 (PDT) From: Corentin Labbe To: davem@davemloft.net, herbert@gondor.apana.org.au, maxime.ripard@bootlin.com, wens@csie.org Cc: linux-arm-kernel@lists.infradead.org, linux-crypto@vger.kernel.org, linux-kernel@vger.kernel.org, linux-sunxi@googlegroups.com, Corentin Labbe Subject: [PATCH] crypto: sun4i-ss: prevent deadlock on emulated hardware Date: Thu, 14 Jun 2018 21:36:59 +0200 Message-Id: <20180614193659.29261-1-clabbe.montjoie@gmail.com> X-Mailer: git-send-email 2.16.4 Sender: linux-crypto-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-crypto@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Running a qemu emulated cubieboard with sun4i-ss driver enabled led to a never ending boot. This is due to sun4i-ss deadlocked and taking all cpu in an infinite loop. Since the crypto hardware is not implemented, all registers are read as 0. So sun4i-ss will never progress in any operations. (TX_CNT being always 0) The first idea is to add a "TX_CNT always zero timeout" but this made cipher/hash loops more complex and prevent a case that never happen on real hardware. The best way to fix is to check at probe time if we run on a virtual machine with hardware emulated but non-implemented and prevent sun4i-ss to be loaded in that case. Letting sun4i-ss to load is useless anyway since all crypto algorithm will be disabled since they will fail crypto selftests. Tested-on: qemu-cubieboard Tested-on: cubieboard2 Signed-off-by: Corentin Labbe --- drivers/crypto/sunxi-ss/sun4i-ss-core.c | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/drivers/crypto/sunxi-ss/sun4i-ss-core.c b/drivers/crypto/sunxi-ss/sun4i-ss-core.c index a81d89b3b7d8..a178e80adcf3 100644 --- a/drivers/crypto/sunxi-ss/sun4i-ss-core.c +++ b/drivers/crypto/sunxi-ss/sun4i-ss-core.c @@ -341,9 +341,18 @@ static int sun4i_ss_probe(struct platform_device *pdev) * I expect to be a sort of Security System Revision number. * Since the A80 seems to have an other version of SS * this info could be useful + * Detect virtual machine with non-implemented hardware + * (qemu-cubieboard) by checking the register value after a write to it. + * On non-implemented hardware, all registers are read as 0. + * On real hardware we should have a value > 0. */ writel(SS_ENABLED, ss->base + SS_CTL); v = readl(ss->base + SS_CTL); + if (!v) { + dev_err(&pdev->dev, "Qemu with non-implemented SS detected.\n"); + err = -ENODEV; + goto error_rst; + } v >>= 16; v &= 0x07; dev_info(&pdev->dev, "Die ID %d\n", v); @@ -398,6 +407,7 @@ static int sun4i_ss_probe(struct platform_device *pdev) break; } } +error_rst: if (ss->reset) reset_control_assert(ss->reset); error_clk: