From patchwork Sun Sep 15 20:55:02 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mark Brown X-Patchwork-Id: 11146149 X-Patchwork-Delegate: herbert@gondor.apana.org.au Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id A5F5E76 for ; Sun, 15 Sep 2019 20:55:35 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 8334F20873 for ; Sun, 15 Sep 2019 20:55:35 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1568580935; bh=wncXS+lC4KvuU8m2b9P1fh2mYosN/BFbprnbywRlJxQ=; h=Date:From:To:Cc:Subject:List-ID:From; b=OA/iY7oFMO+x1dTMoWof3k84WdN9WdKZ7yTy2C4p+5vk9XnEV4BCccJMDqAMqoZ9A jtIh9cUbmHc3ZeZBDmVDznXZwYxnTJKoGoyRPnNylo086BVrBs5TQlF2xJpYqFf69q bSJ7LxcKMPaLYsaKXjgZEkFiyHS2nzooTMMlsewc= Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728135AbfIOUzO (ORCPT ); Sun, 15 Sep 2019 16:55:14 -0400 Received: from heliosphere.sirena.org.uk ([172.104.155.198]:54278 "EHLO heliosphere.sirena.org.uk" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728105AbfIOUzO (ORCPT ); Sun, 15 Sep 2019 16:55:14 -0400 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=sirena.org.uk; s=20170815-heliosphere; h=Content-Type:MIME-Version: Message-ID:Subject:Cc:To:From:Date:Sender:Reply-To:Content-Transfer-Encoding: Content-ID:Content-Description:Resent-Date:Resent-From:Resent-Sender: Resent-To:Resent-Cc:Resent-Message-ID:In-Reply-To:References:List-Id: List-Help:List-Unsubscribe:List-Subscribe:List-Post:List-Owner:List-Archive; bh=UuBvabXaXZFOO2xhlEFUWto9vl2ZskeJnzOvEQ8JQUs=; b=DneEdvos/AO2I2AggSoIgTG6f GX040HO32uD4VpCvjqU9i6Oa6d3bF5J6o0BQPeoqMITxUQ6BWvrtNXDqw6N6FTejytxzJYpePI/Nq 55YEUO88sHiXjQgQudTY4WzCDnmB9vFwSIUTvf1tWxsLgqitXoqVoByw0T5y3gNcWq67c=; Received: from ypsilon.sirena.org.uk ([2001:470:1f1d:6b5::7]) by heliosphere.sirena.org.uk with esmtpsa (TLS1.3:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.92) (envelope-from ) id 1i9bY0-0001LU-2g; Sun, 15 Sep 2019 20:55:04 +0000 Received: by ypsilon.sirena.org.uk (Postfix, from userid 1000) id D3EEF27415FF; Sun, 15 Sep 2019 21:55:02 +0100 (BST) Date: Sun, 15 Sep 2019 21:55:02 +0100 From: Mark Brown To: Guido =?iso-8859-1?q?G=FCnther?= , Angus Ainslie , Shawn Guo , Li Yang , Horia =?utf-8?q?Geant=C4=83?= , Andrey Smirnov , arm@kernel.org, soc@kernel.org, Herbert Xu , Linux Crypto List Cc: "linux-arm-kernel@lists.infradead.org Linux Next Mailing List" , Linux Kernel Mailing List Subject: linux-next: manual merge of the crypto tree with the arm-soc tree Message-ID: <20190915205502.GF4352@sirena.co.uk> MIME-Version: 1.0 Content-Disposition: inline X-Cookie: Man and wife make one fool. User-Agent: Mutt/1.10.1 (2018-07-13) Sender: linux-crypto-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-crypto@vger.kernel.org Hi all, Today's linux-next merge of the crypto tree got a conflict in: arch/arm64/boot/dts/freescale/imx8mq.dtsi between commit: a99b26b14bea506 ("arm64: dts: imx8mq: Add MIPI D-PHY") from the arm-soc tree and commit: 007b3cf0af8cb7d ("arm64: dts: imx8mq: Add CAAM node") from the crypto tree. I fixed it up (see below) and can carry the fix as necessary. This is now fixed as far as linux-next is concerned, but any non trivial conflicts should be mentioned to your upstream maintainer when your tree is submitted for merging. You may also want to consider cooperating with the maintainer of the conflicting tree to minimise any particularly complex conflicts (generally DTS updates go through arm-soc). +++ b/arch/arm64/boot/dts/freescale/imx8mq.dtsi @@@ -743,19 -728,36 +743,49 @@@ status = "disabled"; }; + dphy: dphy@30a00300 { + compatible = "fsl,imx8mq-mipi-dphy"; + reg = <0x30a00300 0x100>; + clocks = <&clk IMX8MQ_CLK_DSI_PHY_REF>; + clock-names = "phy_ref"; + assigned-clocks = <&clk IMX8MQ_CLK_DSI_PHY_REF>; + assigned-clock-parents = <&clk IMX8MQ_VIDEO_PLL1_OUT>; + assigned-clock-rates = <24000000>; + #phy-cells = <0>; + power-domains = <&pgc_mipi>; + status = "disabled"; + }; + + crypto: crypto@30900000 { + compatible = "fsl,sec-v4.0"; + #address-cells = <1>; + #size-cells = <1>; + reg = <0x30900000 0x40000>; + ranges = <0 0x30900000 0x40000>; + interrupts = ; + clocks = <&clk IMX8MQ_CLK_AHB>, + <&clk IMX8MQ_CLK_IPG_ROOT>; + clock-names = "aclk", "ipg"; + + sec_jr0: jr@1000 { + compatible = "fsl,sec-v4.0-job-ring"; + reg = <0x1000 0x1000>; + interrupts = ; + }; + + sec_jr1: jr@2000 { + compatible = "fsl,sec-v4.0-job-ring"; + reg = <0x2000 0x1000>; + interrupts = ; + }; + + sec_jr2: jr@3000 { + compatible = "fsl,sec-v4.0-job-ring"; + reg = <0x3000 0x1000>; + interrupts = ; + }; + }; + i2c1: i2c@30a20000 { compatible = "fsl,imx8mq-i2c", "fsl,imx21-i2c"; reg = <0x30a20000 0x10000>; diff --cc arch/arm64/boot/dts/freescale/imx8mq.dtsi index 046a0c8c8dd56,752d5a61878cb..0000000000000 --- a/arch/arm64/boot/dts/freescale/imx8mq.dtsi