| Message ID | 20191121155554.1227-3-andrew.smirnov@gmail.com (mailing list archive) |
|---|---|
| State | Superseded |
| Delegated to: | Herbert Xu |
| Headers | show |
| Series | enable CAAM's HWRNG as default | expand |
On 11/21/2019 5:56 PM, Andrey Smirnov wrote: > Instantiate CAAM RNG with prediction resistance enabled to improve its > quality. > It's worth noting there are two RNG operations being changed: -instantiation -generation Generation with prediction resistance (PR) is only supported on RNG state handles instantiated with PR option. Using PR when generating randomness effectively forces a reseed of the DRBG / PRNG - that's how quality is improved. > diff --git a/drivers/crypto/caam/caamrng.c b/drivers/crypto/caam/caamrng.c > index e8baacaabe07..6dde8ae3cd9b 100644 > --- a/drivers/crypto/caam/caamrng.c > +++ b/drivers/crypto/caam/caamrng.c > @@ -202,7 +202,8 @@ static inline int rng_create_sh_desc(struct caam_rng_ctx *ctx) > init_sh_desc(desc, HDR_SHARE_SERIAL); > > /* Generate random bytes */ > - append_operation(desc, OP_ALG_ALGSEL_RNG | OP_TYPE_CLASS1_ALG); > + append_operation(desc, OP_ALG_ALGSEL_RNG | OP_TYPE_CLASS1_ALG | > + OP_ALG_PR_ON); > > /* Store bytes */ > append_seq_fifo_store(desc, RN_BUF_SIZE, FIFOST_TYPE_RNGSTORE); > diff --git a/drivers/crypto/caam/ctrl.c b/drivers/crypto/caam/ctrl.c > index df4db10e9fca..a1c879820286 100644 > --- a/drivers/crypto/caam/ctrl.c > +++ b/drivers/crypto/caam/ctrl.c > @@ -36,7 +36,8 @@ static void build_instantiation_desc(u32 *desc, int handle, int do_sk) > init_job_desc(desc, 0); > > op_flags = OP_TYPE_CLASS1_ALG | OP_ALG_ALGSEL_RNG | > - (handle << OP_ALG_AAI_SHIFT) | OP_ALG_AS_INIT; > + (handle << OP_ALG_AAI_SHIFT) | OP_ALG_AS_INIT | > + OP_ALG_PR_ON; > > /* INIT RNG in non-test mode */ > append_operation(desc, op_flags); > @@ -275,11 +276,12 @@ static int instantiate_rng(struct device *ctrldev, int state_handle_mask, > return -ENOMEM; > > for (sh_idx = 0; sh_idx < RNG4_MAX_HANDLES; sh_idx++) { > + const u32 rdsta_mask = (RDSTA_PR0 | RDSTA_IF0) << sh_idx; > /* > * If the corresponding bit is set, this state handle > * was initialized by somebody else, so it's left alone. > */ > - if ((1 << sh_idx) & state_handle_mask) > + if (rdsta_mask & state_handle_mask) > continue; > If a state handle was previously instantiated (e.g. by U-boot), but without prediction resistance support, it won't be re-instantiated ("continue" / skip above). The result is using a state handle without PR support. Due to this, when extracting / generating randomness (in caamrng.c) with the PR bit set, job descriptor will generate a prediction resistance error. IMO the proper thing to do in case a state handle was instantiated without PR support is to re-instantiate it. There's an assumption here though: kernel handles RNG initialization only in some cases, when it's effectively "controlling" it. In cases when it's not, like when Management Complex (MC) f/w is present (or OP-TEE OS, SECO etc.), kernel skips RNG init and only uses the job ring interface for random generation. ==> MC, OP-TEE, SECO etc. have to be updated to initialize RNG state handles with PR support Horia
diff --git a/drivers/crypto/caam/caamrng.c b/drivers/crypto/caam/caamrng.c index e8baacaabe07..6dde8ae3cd9b 100644 --- a/drivers/crypto/caam/caamrng.c +++ b/drivers/crypto/caam/caamrng.c @@ -202,7 +202,8 @@ static inline int rng_create_sh_desc(struct caam_rng_ctx *ctx) init_sh_desc(desc, HDR_SHARE_SERIAL); /* Generate random bytes */ - append_operation(desc, OP_ALG_ALGSEL_RNG | OP_TYPE_CLASS1_ALG); + append_operation(desc, OP_ALG_ALGSEL_RNG | OP_TYPE_CLASS1_ALG | + OP_ALG_PR_ON); /* Store bytes */ append_seq_fifo_store(desc, RN_BUF_SIZE, FIFOST_TYPE_RNGSTORE); diff --git a/drivers/crypto/caam/ctrl.c b/drivers/crypto/caam/ctrl.c index df4db10e9fca..a1c879820286 100644 --- a/drivers/crypto/caam/ctrl.c +++ b/drivers/crypto/caam/ctrl.c @@ -36,7 +36,8 @@ static void build_instantiation_desc(u32 *desc, int handle, int do_sk) init_job_desc(desc, 0); op_flags = OP_TYPE_CLASS1_ALG | OP_ALG_ALGSEL_RNG | - (handle << OP_ALG_AAI_SHIFT) | OP_ALG_AS_INIT; + (handle << OP_ALG_AAI_SHIFT) | OP_ALG_AS_INIT | + OP_ALG_PR_ON; /* INIT RNG in non-test mode */ append_operation(desc, op_flags); @@ -275,11 +276,12 @@ static int instantiate_rng(struct device *ctrldev, int state_handle_mask, return -ENOMEM; for (sh_idx = 0; sh_idx < RNG4_MAX_HANDLES; sh_idx++) { + const u32 rdsta_mask = (RDSTA_PR0 | RDSTA_IF0) << sh_idx; /* * If the corresponding bit is set, this state handle * was initialized by somebody else, so it's left alone. */ - if ((1 << sh_idx) & state_handle_mask) + if (rdsta_mask & state_handle_mask) continue; /* Create the descriptor for instantiating RNG State Handle */ @@ -302,7 +304,7 @@ static int instantiate_rng(struct device *ctrldev, int state_handle_mask, rdsta_val = rd_reg32(&ctrl->r4tst[0].rdsta) & RDSTA_IFMASK; if ((status && status != JRSTA_SSRC_JUMP_HALT_CC) || - !(rdsta_val & (1 << sh_idx))) { + (rdsta_val & rdsta_mask) != rdsta_mask) { ret = -EAGAIN; break; } diff --git a/drivers/crypto/caam/desc.h b/drivers/crypto/caam/desc.h index 4b6854bf896a..e796d3cb9be8 100644 --- a/drivers/crypto/caam/desc.h +++ b/drivers/crypto/caam/desc.h @@ -1254,6 +1254,8 @@ #define OP_ALG_ICV_OFF (0 << OP_ALG_ICV_SHIFT) #define OP_ALG_ICV_ON (1 << OP_ALG_ICV_SHIFT) +#define OP_ALG_PR_ON BIT(1) + #define OP_ALG_DIR_SHIFT 0 #define OP_ALG_DIR_MASK 1 #define OP_ALG_DECRYPT 0 diff --git a/drivers/crypto/caam/regs.h b/drivers/crypto/caam/regs.h index c191e8fd0fa7..fe1f8c1409fd 100644 --- a/drivers/crypto/caam/regs.h +++ b/drivers/crypto/caam/regs.h @@ -524,9 +524,11 @@ struct rng4tst { u32 rsvd1[40]; #define RDSTA_SKVT 0x80000000 #define RDSTA_SKVN 0x40000000 +#define RDSTA_PR0 BIT(4) +#define RDSTA_PR1 BIT(5) #define RDSTA_IF0 0x00000001 #define RDSTA_IF1 0x00000002 -#define RDSTA_IFMASK (RDSTA_IF1 | RDSTA_IF0) +#define RDSTA_IFMASK (RDSTA_PR1 | RDSTA_PR0 | RDSTA_IF1 | RDSTA_IF0) u32 rdsta; u32 rsvd2[15]; };
Instantiate CAAM RNG with prediction resistance enabled to improve its quality. Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Cc: Chris Healy <cphealy@gmail.com> Cc: Lucas Stach <l.stach@pengutronix.de> Cc: Horia Geantă <horia.geanta@nxp.com> Cc: Herbert Xu <herbert@gondor.apana.org.au> Cc: Iuliana Prodan <iuliana.prodan@nxp.com> Cc: linux-crypto@vger.kernel.org Cc: linux-kernel@vger.kernel.org Cc: linux-imx@nxp.com --- drivers/crypto/caam/caamrng.c | 3 ++- drivers/crypto/caam/ctrl.c | 8 +++++--- drivers/crypto/caam/desc.h | 2 ++ drivers/crypto/caam/regs.h | 4 +++- 4 files changed, 12 insertions(+), 5 deletions(-)