diff mbox series

[06/12] crypto: qat - use hweight for bit counting

Message ID 20210928114440.355368-7-giovanni.cabiddu@intel.com (mailing list archive)
State Accepted
Delegated to: Herbert Xu
Headers show
Series crypto: qat - PFVF fixes and refactoring | expand

Commit Message

Cabiddu, Giovanni Sept. 28, 2021, 11:44 a.m. UTC 
Replace homegrown bit counting logic in adf_gen2_get_num_accels() and
adf_gen2_get_num_aes() with the functions hweight16() and hweight32(),
respectively.

Signed-off-by: Giovanni Cabiddu <giovanni.cabiddu@intel.com>
Reviewed-by: Marco Chiappero <marco.chiappero@intel.com>
---
 drivers/crypto/qat/qat_common/adf_gen2_hw_data.c | 16 ++--------------
 1 file changed, 2 insertions(+), 14 deletions(-)
diff mbox series

Patch

diff --git a/drivers/crypto/qat/qat_common/adf_gen2_hw_data.c b/drivers/crypto/qat/qat_common/adf_gen2_hw_data.c
index 1deeeaed9a8c..262bdc05dab4 100644
--- a/drivers/crypto/qat/qat_common/adf_gen2_hw_data.c
+++ b/drivers/crypto/qat/qat_common/adf_gen2_hw_data.c
@@ -54,31 +54,19 @@  EXPORT_SYMBOL_GPL(adf_gen2_disable_vf2pf_interrupts);
 
 u32 adf_gen2_get_num_accels(struct adf_hw_device_data *self)
 {
-	u32 i, ctr = 0;
-
 	if (!self || !self->accel_mask)
 		return 0;
 
-	for (i = 0; i < self->num_accel; i++)
-		if (self->accel_mask & (1 << i))
-			ctr++;
-
-	return ctr;
+	return hweight16(self->accel_mask);
 }
 EXPORT_SYMBOL_GPL(adf_gen2_get_num_accels);
 
 u32 adf_gen2_get_num_aes(struct adf_hw_device_data *self)
 {
-	u32 i, ctr = 0;
-
 	if (!self || !self->ae_mask)
 		return 0;
 
-	for (i = 0; i < self->num_engines; i++)
-		if (self->ae_mask & (1 << i))
-			ctr++;
-
-	return ctr;
+	return hweight32(self->ae_mask);
 }
 EXPORT_SYMBOL_GPL(adf_gen2_get_num_aes);