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[v3,14/16] crypto: ux500/hash: Use AMBA core primecell IDs

Message ID 20220816140049.102306-15-linus.walleij@linaro.org (mailing list archive)
State Changes Requested
Delegated to: Herbert Xu
Headers show
Series Ux500 hash cleanup | expand

Commit Message

Linus Walleij Aug. 16, 2022, 2 p.m. UTC
Use the AMBA (PrimeCell) bus core define and read 32bit
CID and PID from the peripheral, then check those.

Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
---
ChangeLog v2->v3:
- Rebased on v6.0-rc1
ChangeLog v1->v2:
- Initialized both CID and PID to 0 appropriately.
---
 drivers/crypto/ux500/hash/hash_alg.h  | 11 ++---------
 drivers/crypto/ux500/hash/hash_core.c | 25 ++++++++++++++++++-------
 2 files changed, 20 insertions(+), 16 deletions(-)
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Patch

diff --git a/drivers/crypto/ux500/hash/hash_alg.h b/drivers/crypto/ux500/hash/hash_alg.h
index cc44d3cb21ac..96c614444fa2 100644
--- a/drivers/crypto/ux500/hash/hash_alg.h
+++ b/drivers/crypto/ux500/hash/hash_alg.h
@@ -63,15 +63,8 @@ 
 #define HASH_STR_NBLW_MASK	0x0000001FUL
 #define HASH_NBLW_MAX_VAL	0x1F
 
-/* PrimeCell IDs */
-#define HASH_P_ID0		0xE0
-#define HASH_P_ID1		0x05
-#define HASH_P_ID2		0x38
-#define HASH_P_ID3		0x00
-#define HASH_CELL_ID0		0x0D
-#define HASH_CELL_ID1		0xF0
-#define HASH_CELL_ID2		0x05
-#define HASH_CELL_ID3		0xB1
+/* PrimeCell ID */
+#define UX500_HASH_PID		0x003805E0U
 
 /* Hardware access method */
 enum hash_mode {
diff --git a/drivers/crypto/ux500/hash/hash_core.c b/drivers/crypto/ux500/hash/hash_core.c
index ed54e71efbb2..188e309406b2 100644
--- a/drivers/crypto/ux500/hash/hash_core.c
+++ b/drivers/crypto/ux500/hash/hash_core.c
@@ -13,6 +13,7 @@ 
 
 #define pr_fmt(fmt) "hashX hashX: " fmt
 
+#include <linux/amba/bus.h>
 #include <linux/clk.h>
 #include <linux/device.h>
 #include <linux/dma-mapping.h>
@@ -949,18 +950,28 @@  int hash_check_hw(struct hash_device_data *device_data)
 	unsigned int regs[] = { UX500_HASH_PERIPHID0, UX500_HASH_PERIPHID1,
 		UX500_HASH_PERIPHID2, UX500_HASH_PERIPHID3, UX500_HASH_CELLID0,
 		UX500_HASH_CELLID1, UX500_HASH_CELLID2, UX500_HASH_CELLID3 };
-	unsigned int expected[] = { HASH_P_ID0, HASH_P_ID1, HASH_P_ID2, HASH_P_ID3,
-		HASH_CELL_ID0, HASH_CELL_ID1, HASH_CELL_ID2, HASH_CELL_ID3 };
 	unsigned int val;
+	u32 pid = 0;
+	u32 cid = 0;
 	int i;
 
 	for (i = 0; i < ARRAY_SIZE(regs); i++) {
 		regmap_read(device_data->map, regs[i], &val);
-		if (val != expected[i]) {
-			dev_err(device_data->dev, "ID word %d was %08x expected %08x\n",
-				i, val, expected[i]);
-			return -ENODEV;
-		}
+		if (i < 4)
+			pid |= (val & 255) << (i * 8);
+		else
+			cid |= (val & 255) << ((i - 4) * 8);
+	}
+
+	if (cid != AMBA_CID) {
+		dev_err(device_data->dev, "AMBA CID was %08x expected %08x\n",
+			cid, AMBA_CID);
+		return -ENODEV;
+	}
+	if (pid != UX500_HASH_PID) {
+		dev_err(device_data->dev, "PID was %08x expected %08x\n",
+			pid, UX500_HASH_PID);
+		return -ENODEV;
 	}
 
 	return 0;