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Miller" CC: John Allen , , Subject: [PATCH 3/3] crypto: ccp - Add support for PCI device 0x156E Date: Thu, 18 May 2023 22:24:14 -0500 Message-ID: <20230519032414.94247-4-mario.limonciello@amd.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230519032414.94247-1-mario.limonciello@amd.com> References: <20230519032414.94247-1-mario.limonciello@amd.com> MIME-Version: 1.0 X-Originating-IP: [10.180.168.240] X-ClientProxiedBy: SATLEXMB04.amd.com (10.181.40.145) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: DM6NAM11FT031:EE_|IA0PR12MB7673:EE_ X-MS-Office365-Filtering-Correlation-Id: 485d5025-fe55-4fe2-f75a-08db588e7782 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: 0vhemVVw31y7/OC+JEDxwbx5D5rCxVtgcoiYPqHu33J9vJc0YH9D5ZVaJMXEOHDWvj7+XJf8ShSEHZyeIHYPIsMTTD5bsE8ZJ/4PQOFAyNOlPXYtzJpL91C1eCEdI0XJxC1lvM6kunZX+pVEtXu9StCqG4byiZZ/HZrCnCSbfHMlKmtS81LFlB5sM94J91yKRjjwIYWlUrVOQ6tB0reXewLPp14RumCuDpBAgJdwPL5hCj0Oi0nqwBF5FqY+sJeahJjCyO4VfsWqIni195/o7AC+Ug29nBznphInxRds8jVzhAPr3OOLIIPr1t0xdSUMcLkNDXKtKEyLpox9fPxEemraGj6aRsFip3GugXSd0bwDrTP3wTjpDzJ3vvFZ9qGegUo9pYeEgpdg6pNnwI2w1yj1jTTL+tN5BEvh+P3U/aAkMRF2eB2Cr+IePe90OsVI0RbLW/XdOvHyAxSQhwIiZ1EWKlxoIAVjJfyf+osZHuJBW6J1QtgGKFGgqf75xlLoDx/obfeNWWB1nDBiwdtATG5ChRl9ZL0jXRjJtyLJkPT4NmIELEODdA7iqW2TJiwhzHyQIcDY9DyVRBrgPZnkel130XZG21yeuGSvJbqNzP4m4TvBsCPZagWErKmySCaTGsFIwlW5/waZ21sSGdSWGt1VHvDsv8zIvVMuLpSlYrF/wtWPxcVRi/JJR+w8aINyKk+NQQffxXtKBdDnA5KbwD4Sxqs/LiW0OPrCuhDbIx01lTJ0JTrCpadxnN9EzbeURaEJIQZYy1p3m8ZV3xWgPA== X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:SATLEXMB04.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230028)(4636009)(396003)(346002)(136003)(39860400002)(376002)(451199021)(40470700004)(46966006)(36840700001)(16526019)(70206006)(70586007)(4326008)(110136005)(54906003)(82740400003)(8676002)(8936002)(40480700001)(478600001)(316002)(6666004)(41300700001)(7696005)(40460700003)(2906002)(86362001)(81166007)(356005)(26005)(44832011)(47076005)(2616005)(1076003)(36860700001)(186003)(426003)(336012)(36756003)(5660300002)(82310400005)(36900700001);DIR:OUT;SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 19 May 2023 17:28:31.5948 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 485d5025-fe55-4fe2-f75a-08db588e7782 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: DM6NAM11FT031.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: IA0PR12MB7673 Precedence: bulk List-ID: X-Mailing-List: linux-crypto@vger.kernel.org From: John Allen Add a new CCP/PSP PCI device ID and new PSP register offsets. Signed-off-by: John Allen Signed-off-by: Mario Limonciello --- drivers/crypto/ccp/sp-pci.c | 15 +++++++++++++++ 1 file changed, 15 insertions(+) diff --git a/drivers/crypto/ccp/sp-pci.c b/drivers/crypto/ccp/sp-pci.c index d0d70af0c4c0..b603ad9b8341 100644 --- a/drivers/crypto/ccp/sp-pci.c +++ b/drivers/crypto/ccp/sp-pci.c @@ -420,6 +420,14 @@ static const struct psp_vdata pspv5 = { .intsts_reg = 0x10514, /* P2CMSG_INTSTS */ }; +static const struct psp_vdata pspv6 = { + .sev = &sevv2, + .tee = &teev2, + .feature_reg = 0x109fc, /* C2PMSG_63 */ + .inten_reg = 0x10510, /* P2CMSG_INTEN */ + .intsts_reg = 0x10514, /* P2CMSG_INTSTS */ +}; + #endif static const struct sp_dev_vdata dev_vdata[] = { @@ -478,6 +486,12 @@ static const struct sp_dev_vdata dev_vdata[] = { .bar = 2, #ifdef CONFIG_CRYPTO_DEV_SP_PSP .psp_vdata = &pspv5, +#endif + }, + { /* 8 */ + .bar = 2, +#ifdef CONFIG_CRYPTO_DEV_SP_PSP + .psp_vdata = &pspv6, #endif }, }; @@ -491,6 +505,7 @@ static const struct pci_device_id sp_pci_table[] = { { PCI_VDEVICE(AMD, 0x15C7), (kernel_ulong_t)&dev_vdata[6] }, { PCI_VDEVICE(AMD, 0x1649), (kernel_ulong_t)&dev_vdata[6] }, { PCI_VDEVICE(AMD, 0x17E0), (kernel_ulong_t)&dev_vdata[7] }, + { PCI_VDEVICE(AMD, 0x156E), (kernel_ulong_t)&dev_vdata[8] }, /* Last entry must be zero */ { 0, } };