Message ID | 20240127232436.2632187-9-quic_gaurkash@quicinc.com (mailing list archive) |
---|---|
State | Changes Requested |
Delegated to: | Herbert Xu |
Headers | show |
Series | Hardware wrapped key support for qcom ice and ufs | expand |
On 1/28/2024 4:44 AM, Gaurav Kashyap wrote: > Block crypto allows storage controllers like UFS to > register an op derive a software secret from wrapped > keys added to the kernel. > > Wrapped keys in most cases will have vendor specific > implementations, which means this op would need to have > a corresponding UFS variant op. > This change adds hooks in UFS core to support this variant > ops and tie them to the blk crypto op. > > Signed-off-by: Gaurav Kashyap <quic_gaurkash@quicinc.com> > Tested-by: Neil Armstrong <neil.armstrong@linaro.org> > --- Reviewed-by: Om Prakash Singh <quic_omprsing@quicinc.com> > drivers/ufs/core/ufshcd-crypto.c | 15 +++++++++++++++ > include/ufs/ufshcd.h | 4 ++++ > 2 files changed, 19 insertions(+) > > diff --git a/drivers/ufs/core/ufshcd-crypto.c b/drivers/ufs/core/ufshcd-crypto.c > index 399b55d67b3b..c14800eac1ff 100644 > --- a/drivers/ufs/core/ufshcd-crypto.c > +++ b/drivers/ufs/core/ufshcd-crypto.c > @@ -119,6 +119,20 @@ static int ufshcd_crypto_keyslot_evict(struct blk_crypto_profile *profile, > return ufshcd_clear_keyslot(hba, slot); > } > > +static int ufshcd_crypto_derive_sw_secret(struct blk_crypto_profile *profile, > + const u8 wkey[], size_t wkey_size, > + u8 sw_secret[BLK_CRYPTO_SW_SECRET_SIZE]) > +{ > + struct ufs_hba *hba = > + container_of(profile, struct ufs_hba, crypto_profile); > + > + if (hba->vops && hba->vops->derive_sw_secret) > + return hba->vops->derive_sw_secret(hba, wkey, wkey_size, > + sw_secret); > + > + return -EOPNOTSUPP; > +} > + > bool ufshcd_crypto_enable(struct ufs_hba *hba) > { > if (!(hba->caps & UFSHCD_CAP_CRYPTO)) > @@ -132,6 +146,7 @@ bool ufshcd_crypto_enable(struct ufs_hba *hba) > static const struct blk_crypto_ll_ops ufshcd_crypto_ops = { > .keyslot_program = ufshcd_crypto_keyslot_program, > .keyslot_evict = ufshcd_crypto_keyslot_evict, > + .derive_sw_secret = ufshcd_crypto_derive_sw_secret, > }; > > static enum blk_crypto_mode_num > diff --git a/include/ufs/ufshcd.h b/include/ufs/ufshcd.h > index 680c010a53d4..8a773434a329 100644 > --- a/include/ufs/ufshcd.h > +++ b/include/ufs/ufshcd.h > @@ -321,6 +321,7 @@ struct ufs_pwr_mode_info { > * @device_reset: called to issue a reset pulse on the UFS device > * @config_scaling_param: called to configure clock scaling parameters > * @program_key: program or evict an inline encryption key > + * @derive_sw_secret: derive sw secret from a wrapped key > * @event_notify: called to notify important events > * @reinit_notify: called to notify reinit of UFSHCD during max gear switch > * @mcq_config_resource: called to configure MCQ platform resources > @@ -365,6 +366,9 @@ struct ufs_hba_variant_ops { > int (*program_key)(struct ufs_hba *hba, > const struct blk_crypto_key *bkey, > const union ufs_crypto_cfg_entry *cfg, int slot); > + int (*derive_sw_secret)(struct ufs_hba *hba, const u8 wkey[], > + unsigned int wkey_size, > + u8 sw_secret[BLK_CRYPTO_SW_SECRET_SIZE]); > void (*event_notify)(struct ufs_hba *hba, > enum ufs_event_type evt, void *data); > void (*reinit_notify)(struct ufs_hba *);
diff --git a/drivers/ufs/core/ufshcd-crypto.c b/drivers/ufs/core/ufshcd-crypto.c index 399b55d67b3b..c14800eac1ff 100644 --- a/drivers/ufs/core/ufshcd-crypto.c +++ b/drivers/ufs/core/ufshcd-crypto.c @@ -119,6 +119,20 @@ static int ufshcd_crypto_keyslot_evict(struct blk_crypto_profile *profile, return ufshcd_clear_keyslot(hba, slot); } +static int ufshcd_crypto_derive_sw_secret(struct blk_crypto_profile *profile, + const u8 wkey[], size_t wkey_size, + u8 sw_secret[BLK_CRYPTO_SW_SECRET_SIZE]) +{ + struct ufs_hba *hba = + container_of(profile, struct ufs_hba, crypto_profile); + + if (hba->vops && hba->vops->derive_sw_secret) + return hba->vops->derive_sw_secret(hba, wkey, wkey_size, + sw_secret); + + return -EOPNOTSUPP; +} + bool ufshcd_crypto_enable(struct ufs_hba *hba) { if (!(hba->caps & UFSHCD_CAP_CRYPTO)) @@ -132,6 +146,7 @@ bool ufshcd_crypto_enable(struct ufs_hba *hba) static const struct blk_crypto_ll_ops ufshcd_crypto_ops = { .keyslot_program = ufshcd_crypto_keyslot_program, .keyslot_evict = ufshcd_crypto_keyslot_evict, + .derive_sw_secret = ufshcd_crypto_derive_sw_secret, }; static enum blk_crypto_mode_num diff --git a/include/ufs/ufshcd.h b/include/ufs/ufshcd.h index 680c010a53d4..8a773434a329 100644 --- a/include/ufs/ufshcd.h +++ b/include/ufs/ufshcd.h @@ -321,6 +321,7 @@ struct ufs_pwr_mode_info { * @device_reset: called to issue a reset pulse on the UFS device * @config_scaling_param: called to configure clock scaling parameters * @program_key: program or evict an inline encryption key + * @derive_sw_secret: derive sw secret from a wrapped key * @event_notify: called to notify important events * @reinit_notify: called to notify reinit of UFSHCD during max gear switch * @mcq_config_resource: called to configure MCQ platform resources @@ -365,6 +366,9 @@ struct ufs_hba_variant_ops { int (*program_key)(struct ufs_hba *hba, const struct blk_crypto_key *bkey, const union ufs_crypto_cfg_entry *cfg, int slot); + int (*derive_sw_secret)(struct ufs_hba *hba, const u8 wkey[], + unsigned int wkey_size, + u8 sw_secret[BLK_CRYPTO_SW_SECRET_SIZE]); void (*event_notify)(struct ufs_hba *hba, enum ufs_event_type evt, void *data); void (*reinit_notify)(struct ufs_hba *);