From patchwork Fri Oct 30 08:54:02 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: =?utf-8?q?Heiko_St=C3=BCbner?= X-Patchwork-Id: 7525571 X-Patchwork-Delegate: herbert@gondor.apana.org.au Return-Path: X-Original-To: patchwork-linux-crypto@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 1AE789F327 for ; Fri, 30 Oct 2015 08:54:39 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 4076E2084B for ; Fri, 30 Oct 2015 08:54:38 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 39E16207B8 for ; Fri, 30 Oct 2015 08:54:37 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1759226AbbJ3Iyf (ORCPT ); Fri, 30 Oct 2015 04:54:35 -0400 Received: from gloria.sntech.de ([95.129.55.99]:41804 "EHLO gloria.sntech.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1759214AbbJ3Iyc (ORCPT ); Fri, 30 Oct 2015 04:54:32 -0400 Received: from ip545477c2.speed.planet.nl ([84.84.119.194] helo=phil.localnet) by gloria.sntech.de with esmtpsa (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:256) (Exim 4.80) (envelope-from ) id 1Zs5Ro-0003MX-Gm; Fri, 30 Oct 2015 09:54:08 +0100 From: Heiko Stuebner To: Zain Wang Cc: zhengsq@rock-chips.com, hl@rock-chips.com, herbert@gondor.apana.org.au, davem@davemloft.net, mturquette@baylibre.com, pawel.moll@arm.com, ijc+devicetree@hellion.org.uk, robh+dt@kernel.org, galak@codeaurora.org, linux@arm.linux.org.uk, mark.rutland@arm.com, linux-kernel@vger.kernel.org, linux-crypto@vger.kernel.org, linux-rockchip@lists.infradead.org, devicetree@vger.kernel.org, eddie.cai@rock-chips.com, Chris Zhong Subject: Re: [RESEND PATCH 2/4] clk: rockchip: set an id for crypto clk Date: Fri, 30 Oct 2015 09:54:02 +0100 Message-ID: <4280600.OxjmG17dRp@phil> User-Agent: KMail/4.14.10 (Linux/4.2.0-1-amd64; KDE/4.14.13; x86_64; ; ) In-Reply-To: <1446193369-4453-3-git-send-email-zain.wang@rock-chips.com> References: <1446193369-4453-1-git-send-email-zain.wang@rock-chips.com> <1446193369-4453-3-git-send-email-zain.wang@rock-chips.com> MIME-Version: 1.0 Sender: linux-crypto-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-crypto@vger.kernel.org X-Spam-Status: No, score=-7.9 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Hi Zain, Am Freitag, 30. Oktober 2015, 16:22:47 schrieb Zain Wang: > set an id for crypto clk, so that it can be called in other part. > > Signed-off-by: Zain Wang > --- > drivers/clk/rockchip/clk-rk3288.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/drivers/clk/rockchip/clk-rk3288.c b/drivers/clk/rockchip/clk-rk3288.c > index 9040878..d74bd5d 100644 > --- a/drivers/clk/rockchip/clk-rk3288.c > +++ b/drivers/clk/rockchip/clk-rk3288.c > @@ -295,7 +295,7 @@ static struct rockchip_clk_branch rk3288_clk_branches[] __initdata = { > RK3288_CLKGATE_CON(0), 4, GFLAGS), > GATE(0, "c2c_host", "aclk_cpu_src", 0, > RK3288_CLKGATE_CON(13), 8, GFLAGS), > - COMPOSITE_NOMUX(0, "crypto", "aclk_cpu_pre", 0, > + COMPOSITE_NOMUX(SRST_CRYPTO, "crypto", "aclk_cpu_pre", 0, the id you want to use actually is a soft-reset index, not a clock-id. You would need to add a real id, in this case with an sclk_ prefix. > RK3288_CLKSEL_CON(26), 6, 2, DFLAGS, > RK3288_CLKGATE_CON(5), 4, GFLAGS), > GATE(0, "aclk_bus_2pmu", "aclk_cpu_pre", CLK_IGNORE_UNUSED, > It should probably look more like below, but as suggested by Stephen Boyd in another thread, we should coordinate with Chris to add more necessary clock ids in one go: -------- 8< ----------- diff --git a/drivers/clk/rockchip/clk-rk3288.c b/drivers/clk/rockchip/clk-rk3288.c index 9040878..9fd9f5a 100644 --- a/drivers/clk/rockchip/clk-rk3288.c +++ b/drivers/clk/rockchip/clk-rk3288.c @@ -295,7 +295,7 @@ static struct rockchip_clk_branch rk3288_clk_branches[] __initdata = { RK3288_CLKGATE_CON(0), 4, GFLAGS), GATE(0, "c2c_host", "aclk_cpu_src", 0, RK3288_CLKGATE_CON(13), 8, GFLAGS), - COMPOSITE_NOMUX(0, "crypto", "aclk_cpu_pre", 0, + COMPOSITE_NOMUX(SCLK_CRYPTO, "sclk_crypto", "aclk_cpu_pre", 0, RK3288_CLKSEL_CON(26), 6, 2, DFLAGS, RK3288_CLKGATE_CON(5), 4, GFLAGS), GATE(0, "aclk_bus_2pmu", "aclk_cpu_pre", CLK_IGNORE_UNUSED, diff --git a/include/dt-bindings/clock/rk3288-cru.h b/include/dt-bindings/clock/rk3288-cru.h index c719aac..9e0a5e9 100644 --- a/include/dt-bindings/clock/rk3288-cru.h +++ b/include/dt-bindings/clock/rk3288-cru.h @@ -86,6 +86,7 @@ #define SCLK_USBPHY480M_SRC 122 #define SCLK_PVTM_CORE 123 #define SCLK_PVTM_GPU 124 +#define SCLK_CRYPTO 125 #define SCLK_MAC 151 #define SCLK_MACREF_OUT 152