@@ -174,6 +174,13 @@ config DA850_UI_CLCD
endchoice
+config MACH_OMAPL138_HAWKBOARD
+ bool "An OMAP-L138 based Open Platform Hawkboard.org"
+ default ARCH_DAVINCI_DA850
+ depends on ARCH_DAVINCI_DA850
+ help
+ Say Y here to select the OMAP-L138 Based Hawkboard.
+
config DAVINCI_MUX
bool "DAVINCI multiplexing support"
depends on ARCH_DAVINCI
@@ -30,7 +30,7 @@ obj-$(CONFIG_MACH_DAVINCI_DM6467_EVM) += board-dm646x-evm.o
obj-$(CONFIG_MACH_DAVINCI_DM365_EVM) += board-dm365-evm.o
obj-$(CONFIG_MACH_DAVINCI_DA830_EVM) += board-da830-evm.o
obj-$(CONFIG_MACH_DAVINCI_DA850_EVM) += board-da850-evm.o
-
+obj-$(CONFIG_MACH_OMAPL138_HAWKBOARD) += board-omapl138-hawk.o
# Power Management
obj-$(CONFIG_CPU_FREQ) += cpufreq.o
obj-$(CONFIG_CPU_IDLE) += cpuidle.o
new file mode 100755
@@ -0,0 +1,574 @@
+/*
+ * Hawkboar.org based on TI's OMAP-L138 Platform
+ *
+ * Initial code: Syed Mohammed Khasim
+ *
+ * Copyright (C) 2009 Texas Instruments Incorporated - http://www.ti.com
+ *
+ * Derived from: arch/arm/mach-davinci/board-da850-evm.c
+ * Original Copyrights follow:
+ *
+ * 2007, 2009 (c) MontaVista Software, Inc. This file is licensed under
+ * the terms of the GNU General Public License version 2. This program
+ * is licensed "as is" without any warranty of any kind, whether express
+ * or implied.
+ */
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/console.h>
+#include <linux/i2c.h>
+#include <linux/i2c/at24.h>
+#include <linux/i2c/pca953x.h>
+#include <linux/gpio.h>
+#include <linux/platform_device.h>
+#include <linux/mtd/mtd.h>
+#include <linux/mtd/nand.h>
+#include <linux/mtd/partitions.h>
+#include <linux/mtd/physmap.h>
+#include <linux/regulator/machine.h>
+#include <linux/usb/musb.h>
+
+#include <asm/mach-types.h>
+#include <asm/mach/arch.h>
+
+#include <mach/cp_intc.h>
+#include <mach/da8xx.h>
+#include <mach/nand.h>
+#include <mach/mux.h>
+
+#define OMAPL138_HAWK_PHY_MASK (1 << 7)
+#define OMAPL138_HAWK_MDIO_FREQUENCY 2200000 /* PHY bus frequency */
+
+#define DA850_MMCSD_CD_PIN GPIO_TO_PIN(3, 12)
+#define DA850_MMCSD_WP_PIN GPIO_TO_PIN(3, 13)
+
+#define DA850_MII_MDIO_CLKEN_PIN GPIO_TO_PIN(2, 6)
+
+#define DA850_USB1_VBUS_PIN GPIO_TO_PIN(2, 4)
+#define DA850_USB1_OC_PIN GPIO_TO_PIN(6, 13)
+#define DA850_LCDC_RASTER_CTRL 0x01E13028
+
+/* OMAP-L138 Hawkboard includes a 128 MByte Micron NAND flash */
+struct mtd_partition omapl138_hawk_nandflash_partition[] = {
+ {
+ .name = "u-boot env",
+ .offset = 0,
+ .size = SZ_128K,
+ .mask_flags = MTD_WRITEABLE,
+ },
+ {
+ .name = "UBL",
+ .offset = MTDPART_OFS_APPEND,
+ .size = SZ_128K,
+ .mask_flags = MTD_WRITEABLE,
+ },
+ {
+ .name = "u-boot",
+ .offset = MTDPART_OFS_APPEND,
+ .size = 4 * SZ_128K,
+ .mask_flags = MTD_WRITEABLE,
+ },
+ {
+ .name = "kernel",
+ .offset = 0x200000,
+ .size = SZ_2M,
+ .mask_flags = 0,
+ },
+ {
+ .name = "filesystem",
+ .offset = MTDPART_OFS_APPEND,
+ .size = MTDPART_SIZ_FULL,
+ .mask_flags = 0,
+ },
+};
+
+static struct davinci_nand_pdata omapl138_hawk_nandflash_data = {
+ .parts = omapl138_hawk_nandflash_partition,
+ .nr_parts = ARRAY_SIZE(omapl138_hawk_nandflash_partition),
+ .ecc_mode = NAND_ECC_HW,
+ .ecc_bits = 4,
+ .options = NAND_USE_FLASH_BBT,
+};
+
+static struct resource omapl138_hawk_nandflash_resource[] = {
+ {
+ .start = DA8XX_AEMIF_CS3_BASE,
+ .end = DA8XX_AEMIF_CS3_BASE + SZ_512K + 2 * SZ_1K - 1,
+ .flags = IORESOURCE_MEM,
+ },
+ {
+ .start = DA8XX_AEMIF_CTL_BASE,
+ .end = DA8XX_AEMIF_CTL_BASE + SZ_32K - 1,
+ .flags = IORESOURCE_MEM,
+ },
+};
+
+static struct platform_device omapl138_hawk_nandflash_device = {
+ .name = "davinci_nand",
+ .id = 1,
+ .dev = {
+ .platform_data = &omapl138_hawk_nandflash_data,
+ },
+ .num_resources = ARRAY_SIZE(omapl138_hawk_nandflash_resource),
+ .resource = omapl138_hawk_nandflash_resource,
+};
+
+static struct platform_device *omapl138_hawk_devices[] __initdata = {
+ &omapl138_hawk_nandflash_device,
+};
+
+#define DA8XX_AEMIF_CE3CFG_OFFSET 0x14
+
+static void __init omapl138_hawk_init_nand(void)
+{
+ void __iomem *aemif_addr;
+ u32 ce3cfg;
+
+ aemif_addr = ioremap(DA8XX_AEMIF_CTL_BASE, SZ_32K);
+
+ ce3cfg = 0
+ | (0 << 31) /* selectStrobe */
+ | (0 << 30) /* extWait */
+ | (0 << 26) /* writeSetup */
+ | (3 << 20) /* writeStrobe 30 ns */
+ | (3 << 17) /* writeHold 30 ns */
+ | (2 << 13) /* readSetup 20 ns */
+ | (4 << 7) /* readStrobe 40 ns */
+ | (0 << 4) /* readHold */
+ | (0 << 2) /* turnAround */
+ | (0 << 0) /* asyncSize 8-bit bus */
+ ;
+
+ writel(ce3cfg, aemif_addr + DA8XX_AEMIF_CE3CFG_OFFSET);
+
+ iounmap(aemif_addr);
+}
+
+#if defined(CONFIG_MMC_DAVINCI) || \
+ defined(CONFIG_MMC_DAVINCI_MODULE)
+#define HAS_MMC 1
+#else
+#define HAS_MMC 0
+#endif
+
+static __init void omapl138_hawk_setup_nand(void)
+{
+ int ret = 0;
+
+ ret = da8xx_pinmux_setup(da850_nand_pins);
+ if (ret)
+ pr_warning("hawk_init: nand mux setup failed: "
+ "%d\n", ret);
+ omapl138_hawk_init_nand();
+ platform_add_devices(omapl138_hawk_devices,
+ ARRAY_SIZE(omapl138_hawk_devices));
+}
+
+static struct i2c_board_info __initdata omapl138_hawk_i2c_devices[] = {
+ {
+ I2C_BOARD_INFO("tlv320aic3x", 0x18),
+ },
+};
+
+static struct davinci_i2c_platform_data omapl138_hawk_i2c_0_pdata = {
+ .bus_freq = 100, /* kHz */
+ .bus_delay = 0, /* usec */
+};
+
+static struct davinci_uart_config omapl138_hawk_uart_config __initdata = {
+ .enabled_uarts = 0x7,
+};
+
+/* davinci da850 evm audio machine driver */
+static u8 da850_iis_serializer_direction[] = {
+ INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE,
+ INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE,
+ INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE,
+ INACTIVE_MODE, TX_MODE, RX_MODE, INACTIVE_MODE,
+};
+
+static struct snd_platform_data omapl138_hawk_snd_data = {
+ .tx_dma_offset = 0x2000,
+ .rx_dma_offset = 0x2000,
+ .op_mode = DAVINCI_MCASP_IIS_MODE,
+ .num_serializer = ARRAY_SIZE(da850_iis_serializer_direction),
+ .tdm_slots = 2,
+ .serial_dir = da850_iis_serializer_direction,
+ .eventq_no = EVENTQ_1,
+ .version = MCASP_VERSION_2,
+ .txnumevt = 1,
+ .rxnumevt = 1,
+};
+
+static struct davinci_mcbsp_platform_data da850_mcbsp0_config = {
+ .inst = 0,
+};
+
+static struct davinci_mcbsp_platform_data da850_mcbsp1_config = {
+ .inst = 1,
+};
+
+static int omapl138_hawk_mmc_get_ro(int index)
+{
+ return gpio_get_value(DA850_MMCSD_WP_PIN);
+}
+
+static int omapl138_hawk_mmc_get_cd(int index)
+{
+ return !gpio_get_value(DA850_MMCSD_CD_PIN);
+}
+
+static struct davinci_mmc_config da850_mmc_config = {
+ .get_ro = omapl138_hawk_mmc_get_ro,
+ .get_cd = omapl138_hawk_mmc_get_cd,
+ .wires = 4,
+ .max_freq = 50000000,
+ .caps = MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED,
+ .version = MMC_CTLR_VERSION_2,
+};
+
+static int __init omapl138_hawk_config_emac(void)
+{
+ void __iomem *cfg_chip3_base;
+ int ret;
+ u32 val;
+ struct davinci_soc_info *soc_info = &davinci_soc_info;
+
+ cfg_chip3_base = DA8XX_SYSCFG_VIRT(DA8XX_CFGCHIP3_REG);
+
+ val = __raw_readl(cfg_chip3_base);
+
+ val &= ~BIT(8);
+ ret = da8xx_pinmux_setup(da850_cpgmac_pins);
+
+ if (ret)
+ pr_warning("hawk_init: cpgmac/rmii mux setup failed: %d\n",
+ ret);
+
+ /* configure the CFGCHIP3 register for RMII or MII */
+ __raw_writel(val, cfg_chip3_base);
+
+ ret = davinci_cfg_reg(DA850_GPIO2_6);
+ if (ret)
+ pr_warning("hawk_init:GPIO(2,6) mux setup" "failed\n");
+
+ ret = gpio_request(DA850_MII_MDIO_CLKEN_PIN, "mdio_clk_en");
+ if (ret) {
+ pr_warning("Cannot open GPIO %d\n",
+ DA850_MII_MDIO_CLKEN_PIN);
+ return ret;
+ }
+
+ /* Enable/Disable MII MDIO clock */
+ gpio_direction_output(DA850_MII_MDIO_CLKEN_PIN, 0);
+
+ soc_info->emac_pdata->phy_mask = OMAPL138_HAWK_PHY_MASK;
+ soc_info->emac_pdata->mdio_max_freq = OMAPL138_HAWK_MDIO_FREQUENCY;
+
+ ret = da8xx_register_emac();
+ if (ret)
+ pr_warning("hawk_init: emac registration failed: %d\n",
+ ret);
+ return 0;
+}
+device_initcall(omapl138_hawk_config_emac);
+
+#if defined(CONFIG_DAVINCI_MCBSP0)
+#define HAS_MCBSP0 1
+#else
+#define HAS_MCBSP0 0
+#endif
+
+#if defined(CONFIG_DAVINCI_MCBSP1)
+#define HAS_MCBSP1 1
+#else
+#define HAS_MCBSP1 0
+#endif
+
+#if defined(CONFIG_TI_DAVINCI_EMAC) || \
+ defined(CONFIG_TI_DAVINCI_EMAC_MODULE)
+#define HAS_EMAC 1
+#else
+#define HAS_EMAC 0
+#endif
+
+#if defined(CONFIG_SND_DA850_SOC_EVM) || \
+ defined(CONFIG_SND_DA850_SOC_EVM_MODULE)
+#define HAS_MCASP 1
+#else
+#define HAS_MCASP 0
+#endif
+
+static da8xx_ocic_handler_t omapl138_hawk_usb_ocic_handler;
+
+static int omapl138_hawk_usb_set_power(unsigned port, int on)
+{
+ gpio_set_value(DA850_USB1_VBUS_PIN, on);
+ return 0;
+}
+
+static int omapl138_hawk_usb_get_power(unsigned port)
+{
+ return gpio_get_value(DA850_USB1_VBUS_PIN);
+}
+
+static int omapl138_hawk_usb_get_oci(unsigned port)
+{
+ return !gpio_get_value(DA850_USB1_OC_PIN);
+}
+
+static irqreturn_t omapl138_hawk_usb_ocic_irq(int, void *);
+
+static int omapl138_hawk_usb_ocic_notify(da8xx_ocic_handler_t handler)
+{
+ int irq = gpio_to_irq(DA850_USB1_OC_PIN);
+ int error = 0;
+
+ if (handler != NULL) {
+ omapl138_hawk_usb_ocic_handler = handler;
+
+ error = request_irq(irq, omapl138_hawk_usb_ocic_irq,
+ IRQF_DISABLED | IRQF_TRIGGER_RISING |
+ IRQF_TRIGGER_FALLING,
+ "OHCI over-current indicator", NULL);
+ if (error)
+ printk(KERN_ERR "%s: could not request IRQ to watch "
+ "over-current indicator changes\n", __func__);
+ } else
+ free_irq(irq, NULL);
+
+ return error;
+}
+
+static struct da8xx_ohci_root_hub omapl138_hawk_usb11_pdata = {
+ .set_power = omapl138_hawk_usb_set_power,
+ .get_power = omapl138_hawk_usb_get_power,
+ .get_oci = omapl138_hawk_usb_get_oci,
+ .ocic_notify = omapl138_hawk_usb_ocic_notify,
+
+ /* TPS2065 switch @ 5V */
+ .potpgt = (3 + 1) / 2, /* 3 ms max */
+};
+
+static irqreturn_t omapl138_hawk_usb_ocic_irq(int irq, void *dev_id)
+{
+ omapl138_hawk_usb_ocic_handler(&omapl138_hawk_usb11_pdata, 1);
+ return IRQ_HANDLED;
+}
+
+static struct musb_hdrc_platform_data usb_evm_data[] = {
+ {
+#ifdef CONFIG_USB_MUSB_OTG
+ .mode = MUSB_OTG,
+#elif defined(CONFIG_USB_MUSB_DUAL_ROLE)
+ .mode = MUSB_DUAL_ROLE,
+#elif defined(CONFIG_USB_MUSB_PERIPHERAL)
+ .mode = MUSB_PERIPHERAL,
+#elif defined(CONFIG_USB_MUSB_HOST)
+ .mode = MUSB_HOST,
+#endif
+ .power = 255,
+ .potpgt = 8,
+ .set_vbus = NULL, /* VBUs is directly controlled by the IP */
+ }
+};
+
+static __init void omapl138_hawk_usb_init(void)
+{
+ int ret;
+ u32 cfgchip2;
+
+ /*
+ * Setup the Ref. clock frequency for the EVM at 24 MHz.
+ */
+ cfgchip2 = __raw_readl(DA8XX_SYSCFG_VIRT(DA8XX_CFGCHIP2_REG));
+ cfgchip2 &= ~CFGCHIP2_REFFREQ;
+ cfgchip2 |= CFGCHIP2_REFFREQ_24MHZ;
+ __raw_writel(cfgchip2, DA8XX_SYSCFG_VIRT(DA8XX_CFGCHIP2_REG));
+
+ da8xx_usb20_configure(usb_evm_data, ARRAY_SIZE(usb_evm_data));
+
+ ret = da8xx_pinmux_setup(da850_evm_usb11_pins);
+ if (ret) {
+ pr_warning("%s: USB 1.1 PinMux setup failed: %d\n",
+ __func__, ret);
+ return;
+ }
+
+ ret = gpio_request(DA850_USB1_VBUS_PIN, "USB1 VBUS\n");
+ if (ret) {
+ printk(KERN_ERR "%s: failed to request GPIO for USB 1.1 port "
+ "power control: %d\n", __func__, ret);
+ return;
+ }
+ gpio_direction_output(DA850_USB1_VBUS_PIN, 0);
+
+ ret = gpio_request(DA850_USB1_OC_PIN, "USB1 OC");
+ if (ret) {
+ printk(KERN_ERR "%s: failed to request GPIO for USB 1.1 port "
+ "over-current indicator: %d\n", __func__, ret);
+ return;
+ }
+ gpio_direction_input(DA850_USB1_OC_PIN);
+
+ ret = da8xx_register_usb11(&omapl138_hawk_usb11_pdata);
+ if (ret)
+ pr_warning("%s: USB 1.1 registration failed: %d\n",
+ __func__, ret);
+}
+static __init void omapl138_hawk_init(void)
+{
+ int ret;
+
+ ret = da8xx_register_edma();
+ if (ret)
+ pr_warning("hawk_init: edma registration failed: %d\n",
+ ret);
+
+ ret = da8xx_pinmux_setup(da850_i2c0_pins);
+ if (ret)
+ pr_warning("hawk_init: i2c0 mux setup failed: %d\n",
+ ret);
+
+ ret = da8xx_register_i2c(0, &omapl138_hawk_i2c_0_pdata);
+ if (ret)
+ pr_warning("hawk_init: i2c0 registration failed: %d\n",
+ ret);
+
+ davinci_serial_init(&omapl138_hawk_uart_config);
+
+ i2c_register_board_info(1, omapl138_hawk_i2c_devices,
+ ARRAY_SIZE(omapl138_hawk_i2c_devices));
+
+ __raw_writel(0, IO_ADDRESS(DA850_LCDC_RASTER_CTRL));
+
+ /*
+ * shut down uart 0 and 1; they are not used on the board and
+ * accessing them causes endless "too much work in irq53" messages
+ * with arago fs
+ */
+ __raw_writel(0, IO_ADDRESS(DA8XX_UART1_BASE) + 0x30);
+ __raw_writel(0, IO_ADDRESS(DA8XX_UART0_BASE) + 0x30);
+
+ ret = da8xx_register_watchdog();
+ if (ret)
+ pr_warning("evm_init: watchdog registration failed: %d\n",
+ ret);
+
+ if (HAS_MMC) {
+ ret = da8xx_pinmux_setup(da850_mmcsd0_pins);
+ if (ret)
+ pr_warning("hawk_init: mmcsd0 mux setup failed:"
+ "%d\n", ret);
+
+ ret = gpio_request(DA850_MMCSD_CD_PIN, "MMC CD\n");
+ if (ret)
+ pr_warning("hawk_init: can not open GPIO %d\n",
+ DA850_MMCSD_CD_PIN);
+ gpio_direction_input(DA850_MMCSD_CD_PIN);
+
+ ret = gpio_request(DA850_MMCSD_WP_PIN, "MMC WP\n");
+ if (ret)
+ pr_warning("hawk_init: can not open GPIO %d\n",
+ DA850_MMCSD_WP_PIN);
+ gpio_direction_input(DA850_MMCSD_WP_PIN);
+
+ ret = da8xx_register_mmcsd0(&da850_mmc_config);
+ if (ret)
+ pr_warning("hawk_init: mmcsd0 registration failed:"
+ "%d\n", ret);
+ }
+
+ if (HAS_MCBSP0) {
+ if (HAS_EMAC)
+ pr_warning("WARNING: both MCBSP0 and EMAC are "
+ "enabled, but they share pins.\n"
+ "\tDisable one of them.\n");
+
+ ret = da8xx_pinmux_setup(da850_mcbsp0_pins);
+ if (ret)
+ pr_warning("hawk_init: mcbsp0 mux setup failed:"
+ "%d\n", ret);
+
+ ret = da850_init_mcbsp(&da850_mcbsp0_config);
+ if (ret)
+ pr_warning("hawk_init: mcbsp0 registration"
+ "failed: %d\n", ret);
+ }
+
+ if (HAS_MCBSP1) {
+ ret = da8xx_pinmux_setup(da850_mcbsp1_pins);
+ if (ret)
+ pr_warning("hawk_init: mcbsp1 mux setup failed:"
+ "%d\n", ret);
+
+ ret = da850_init_mcbsp(&da850_mcbsp1_config);
+ if (ret)
+ pr_warning("hawk_init: mcbsp1 registration"
+ "failed: %d\n", ret);
+ }
+
+ if (HAS_MCASP) {
+ if ((HAS_MCBSP0 || HAS_MCBSP1))
+ pr_warning("WARNING: both McASP and McBSP are enabled, "
+ "but they share pins.\n"
+ "\tDisable one of them.\n");
+
+ ret = da8xx_pinmux_setup(da850_mcasp_pins);
+ if (ret)
+ pr_warning("hawk_init: mcasp mux setup failed:"
+ "%d\n", ret);
+
+ da8xx_register_mcasp(0, &omapl138_hawk_snd_data);
+ }
+
+ ret = da8xx_pinmux_setup(da850_lcdcntl_pins);
+ if (ret)
+ pr_warning("hawk_init: lcdcntl mux setup failed: %d\n",
+ ret);
+
+ ret = da8xx_register_lcdc(&vga_monitor_pdata);
+ if (ret)
+ pr_warning("hawk_init: lcdc registration failed: %d\n",
+ ret);
+
+ omapl138_hawk_usb_init();
+
+ ret = da8xx_register_sata();
+ if (ret)
+ pr_warning("hawk_init: SATA registration failed: %d\n",
+ ret);
+
+ omapl138_hawk_setup_nand();
+}
+
+#ifdef CONFIG_SERIAL_8250_CONSOLE
+static int __init omapl138_hawk_console_init(void)
+{
+ return add_preferred_console("ttyS", 2, "115200");
+}
+console_initcall(omapl138_hawk_console_init);
+#endif
+
+static __init void omapl138_hawk_irq_init(void)
+{
+ struct davinci_soc_info *soc_info = &davinci_soc_info;
+
+ cp_intc_init((void __iomem *)DA8XX_CP_INTC_VIRT, DA850_N_CP_INTC_IRQ,
+ soc_info->intc_irq_prios);
+}
+
+static void __init omapl138_hawk_map_io(void)
+{
+ da850_init();
+}
+
+MACHINE_START(OMAPL138_HAWKBOARD, "OMAPL 138 Hawkboard.org")
+ .phys_io = IO_PHYS,
+ .io_pg_offst = (__IO_ADDRESS(IO_PHYS) >> 18) & 0xfffc,
+ .boot_params = (DA8XX_DDR_BASE + 0x100),
+ .map_io = omapl138_hawk_map_io,
+ .init_irq = omapl138_hawk_irq_init,
+ .timer = &davinci_timer,
+ .init_machine = omapl138_hawk_init,
+MACHINE_END
@@ -27,7 +27,8 @@
#if defined(CONFIG_ARCH_DAVINCI_DA8XX) && defined(CONFIG_ARCH_DAVINCI_DMx)
#error Cannot enable DaVinci and DA8XX platforms concurrently
#elif defined(CONFIG_MACH_DAVINCI_DA830_EVM) || \
- defined(CONFIG_MACH_DAVINCI_DA850_EVM)
+ defined(CONFIG_MACH_DAVINCI_DA850_EVM) || \
+ defined(CONFIG_MACH_OMAPL138_HAWKBOARD)
orr \rx, \rx, #0x00d00000 @ physical base address
orr \rx, \rx, #0x0000d000 @ of UART 2
#else