| Message ID | 1248355795-5269-1-git-send-email-sudhakar.raj@ti.com (mailing list archive) |
|---|---|
| State | Changes Requested |
| Headers | show |
Sudhakar Rajashekhara <sudhakar.raj@ti.com> writes: > This patch adds platform data for the 512MB NAND Flash > found on DA850/OMAP-L138 EVM. Currently it supports > only 1-bit ECC. > > Signed-off-by: Sudhakar Rajashekhara <sudhakar.raj@ti.com> Looks fine. > --- > This patch has been tested on DA850/OMAP-L138. > > This patch depends on the following two patches which > I have submitted to davinci git: > [PATCH] davinci: Add MMC/SD support for da850/omap-l138 > [PATCH] davinci: Configure MDIO pins for EMAC Again, needs rebase on master or updated MMC series. Kevin > arch/arm/mach-davinci/board-da850-evm.c | 92 ++++++++++++++++++++++++++++ > arch/arm/mach-davinci/da850.c | 31 +++++++++ > arch/arm/mach-davinci/include/mach/da8xx.h | 3 + > arch/arm/mach-davinci/include/mach/mux.h | 16 +++++ > 4 files changed, 142 insertions(+), 0 deletions(-) > > diff --git a/arch/arm/mach-davinci/board-da850-evm.c b/arch/arm/mach-davinci/board-da850-evm.c > index ae4a2f0..5f3e45b 100644 > --- a/arch/arm/mach-davinci/board-da850-evm.c > +++ b/arch/arm/mach-davinci/board-da850-evm.c > @@ -18,6 +18,10 @@ > #include <linux/i2c.h> > #include <linux/i2c/at24.h> > #include <linux/gpio.h> > +#include <linux/platform_device.h> > +#include <linux/mtd/mtd.h> > +#include <linux/mtd/nand.h> > +#include <linux/mtd/partitions.h> > > #include <asm/mach-types.h> > #include <asm/mach/arch.h> > @@ -26,10 +30,81 @@ > #include <mach/irqs.h> > #include <mach/cp_intc.h> > #include <mach/da8xx.h> > +#include <mach/nand.h> > > #define DA850_EVM_PHY_MASK 0x1 > #define DA850_EVM_MDIO_FREQUENCY 2200000 /* PHY bus frequency */ > > +#if defined(CONFIG_MTD_NAND_DAVINCI) || defined(CONFIG_MTD_NAND_DAVINCI_MODULE) > +/* DA850/OMAP-L138 EVM includes a 512 MByte large-page NAND flash > + * (128K blocks). It may be used instead of the (default) SPI flash > + * to boot, using TI's tools to install the secondary boot loader > + * (UBL) and U-Boot. > + */ > +struct mtd_partition da850_evm_nandflash_partition[] = { > + { > + .name = "u-boot env", > + .offset = 0, > + .size = SZ_128K, > + .mask_flags = MTD_WRITEABLE, > + }, > + { > + .name = "UBL", > + .offset = MTDPART_OFS_APPEND, > + .size = SZ_128K, > + .mask_flags = MTD_WRITEABLE, > + }, > + { > + .name = "u-boot", > + .offset = MTDPART_OFS_APPEND, > + .size = 4 * SZ_128K, > + .mask_flags = MTD_WRITEABLE, > + }, > + { > + .name = "kernel", > + .offset = 0x200000, > + .size = SZ_2M, > + .mask_flags = 0, > + }, > + { > + .name = "filesystem", > + .offset = MTDPART_OFS_APPEND, > + .size = MTDPART_SIZ_FULL, > + .mask_flags = 0, > + }, > +}; > + > +static struct davinci_nand_pdata da850_evm_nandflash_data = { > + .parts = da850_evm_nandflash_partition, > + .nr_parts = ARRAY_SIZE(da850_evm_nandflash_partition), > + .ecc_mode = NAND_ECC_HW, > + .options = NAND_USE_FLASH_BBT, > +}; > + > +static struct resource da850_evm_nandflash_resource[] = { > + { > + .start = DA8XX_AEMIF_CS3_BASE, > + .end = DA8XX_AEMIF_CS3_BASE + SZ_512K + 2 * SZ_1K - 1, > + .flags = IORESOURCE_MEM, > + }, > + { > + .start = DA8XX_AEMIF_CTL_BASE, > + .end = DA8XX_AEMIF_CTL_BASE + SZ_32K - 1, > + .flags = IORESOURCE_MEM, > + }, > +}; > + > +static struct platform_device da850_evm_nandflash_device = { > + .name = "davinci_nand", > + .id = 1, > + .dev = { > + .platform_data = &da850_evm_nandflash_data, > + }, > + .num_resources = ARRAY_SIZE(da850_evm_nandflash_resource), > + .resource = da850_evm_nandflash_resource, > +}; > +#endif > + > static struct davinci_i2c_platform_data da850_evm_i2c_0_pdata = { > .bus_freq = 100, /* kHz */ > .bus_delay = 0, /* usec */ > @@ -39,6 +114,12 @@ static struct davinci_uart_config da850_evm_uart_config __initdata = { > .enabled_uarts = 0x7, > }; > > +static struct platform_device *da850_evm_devices[] __initdata = { > +#if defined(CONFIG_MTD_NAND_DAVINCI) || defined(CONFIG_MTD_NAND_DAVINCI_MODULE) > + &da850_evm_nandflash_device, > +#endif > +}; > + > #if defined(CONFIG_MMC_DAVINCI) || defined(CONFIG_MMC_DAVINCI_MODULE) > static int da850_evm_mmc_get_ro(int index) > { > @@ -87,6 +168,16 @@ static __init void da850_evm_init(void) > struct davinci_soc_info *soc_info = &davinci_soc_info; > int ret; > > +#if defined(CONFIG_MTD_NAND_DAVINCI) || defined(CONFIG_MTD_NAND_DAVINCI_MODULE) > + ret = da8xx_pinmux_setup(da850_nand_pins); > + if (ret) > + pr_warning("da850_evm_init: nand mux setup failed: %d\n", > + ret); > +#endif > + > + platform_add_devices(da850_evm_devices, > + ARRAY_SIZE(da850_evm_devices)); > + > ret = da8xx_register_edma(); > if (ret) > pr_warning("da850_evm_init: edma registration failed: %d\n", > @@ -120,6 +211,7 @@ static __init void da850_evm_init(void) > if (ret) > pr_warning("da830_evm_init: watchdog registration failed: %d\n", > ret); > + > #if defined(CONFIG_MMC_DAVINCI) || defined(CONFIG_MMC_DAVINCI_MODULE) > ret = da8xx_pinmux_setup(da850_mmcsd0_pins); > if (ret) > diff --git a/arch/arm/mach-davinci/da850.c b/arch/arm/mach-davinci/da850.c > index 4b5ac24..a05077a 100644 > --- a/arch/arm/mach-davinci/da850.c > +++ b/arch/arm/mach-davinci/da850.c > @@ -296,6 +296,13 @@ static struct clk mmcsd_clk = { > .lpsc = DA8XX_LPSC0_MMC_SD, > }; > > +static struct clk aemif_clk = { > + .name = "aemif", > + .parent = &pll0_sysclk3, > + .lpsc = DA8XX_LPSC0_EMIF25, > + .flags = ALWAYS_ENABLED, > +}; > + > static struct davinci_clk da850_clks[] = { > CLK(NULL, "ref", &ref_clk), > CLK(NULL, "pll0", &pll0_clk), > @@ -334,6 +341,7 @@ static struct davinci_clk da850_clks[] = { > CLK(NULL, "rmii", &rmii_clk), > CLK("davinci_emac.1", NULL, &emac_clk), > CLK("davinci_mmc.0", NULL, &mmcsd_clk), > + CLK(NULL, "aemif", &aemif_clk), > CLK(NULL, NULL, NULL), > }; > > @@ -387,6 +395,21 @@ static const struct mux_config da850_pins[] = { > MUX_CFG(DA850, MMCSD0_DAT_3, 10, 20, 15, 2, false) > MUX_CFG(DA850, MMCSD0_CLK, 10, 0, 15, 2, false) > MUX_CFG(DA850, MMCSD0_CMD, 10, 4, 15, 2, false) > + /* EMIF2.5/EMIFA function */ > + MUX_CFG(DA850, EMA_D_7, 9, 0, 15, 1, false) > + MUX_CFG(DA850, EMA_D_6, 9, 4, 15, 1, false) > + MUX_CFG(DA850, EMA_D_5, 9, 8, 15, 1, false) > + MUX_CFG(DA850, EMA_D_4, 9, 12, 15, 1, false) > + MUX_CFG(DA850, EMA_D_3, 9, 16, 15, 1, false) > + MUX_CFG(DA850, EMA_D_2, 9, 20, 15, 1, false) > + MUX_CFG(DA850, EMA_D_1, 9, 24, 15, 1, false) > + MUX_CFG(DA850, EMA_D_0, 9, 28, 15, 1, false) > + MUX_CFG(DA850, EMA_A_1, 12, 24, 15, 1, false) > + MUX_CFG(DA850, EMA_A_2, 12, 20, 15, 1, false) > + MUX_CFG(DA850, NEMA_CS_3, 7, 4, 15, 1, false) > + MUX_CFG(DA850, NEMA_CS_4, 7, 8, 15, 1, false) > + MUX_CFG(DA850, NEMA_WE, 7, 16, 15, 1, false) > + MUX_CFG(DA850, NEMA_OE, 7, 20, 15, 1, false) > #endif > }; > > @@ -430,6 +453,14 @@ const short da850_mmcsd0_pins[] __initdata = { > -1 > }; > > +const short da850_nand_pins[] __initdata = { > + DA850_EMA_D_7, DA850_EMA_D_6, DA850_EMA_D_5, DA850_EMA_D_4, > + DA850_EMA_D_3, DA850_EMA_D_2, DA850_EMA_D_1, DA850_EMA_D_0, > + DA850_EMA_A_1, DA850_EMA_A_2, DA850_NEMA_CS_3, DA850_NEMA_CS_4, > + DA850_NEMA_WE, DA850_NEMA_OE, > + -1 > +}; > + > /* FIQ are pri 0-1; otherwise 2-7, with 7 lowest priority */ > static u8 da850_default_priorities[DA850_N_CP_INTC_IRQ] = { > [IRQ_DA8XX_COMMTX] = 7, > diff --git a/arch/arm/mach-davinci/include/mach/da8xx.h b/arch/arm/mach-davinci/include/mach/da8xx.h > index e597900..aa08afe 100644 > --- a/arch/arm/mach-davinci/include/mach/da8xx.h > +++ b/arch/arm/mach-davinci/include/mach/da8xx.h > @@ -38,6 +38,8 @@ > #define DA8XX_GPIO_BASE 0x01e26000 > #define DA8XX_PSC1_BASE 0x01e27000 > #define DA8XX_MMCSD0_BASE 0x01c40000 > +#define DA8XX_AEMIF_CS3_BASE 0x62000000 > +#define DA8XX_AEMIF_CTL_BASE 0x68000000 > > #define PINMUX0 0x00 > #define PINMUX1 0x04 > @@ -104,6 +106,7 @@ extern const short da850_i2c0_pins[]; > extern const short da850_i2c1_pins[]; > extern const short da850_cpgmac_pins[]; > extern const short da850_mmcsd0_pins[]; > +extern const short da850_nand_pins[]; > > int da8xx_pinmux_setup(const short pins[]); > > diff --git a/arch/arm/mach-davinci/include/mach/mux.h b/arch/arm/mach-davinci/include/mach/mux.h > index 09dbede..13bd634 100644 > --- a/arch/arm/mach-davinci/include/mach/mux.h > +++ b/arch/arm/mach-davinci/include/mach/mux.h > @@ -757,6 +757,22 @@ enum davinci_da850_index { > DA850_MMCSD0_DAT_3, > DA850_MMCSD0_CLK, > DA850_MMCSD0_CMD, > + > + /* EMIF2.5/EMIFA function */ > + DA850_EMA_D_7, > + DA850_EMA_D_6, > + DA850_EMA_D_5, > + DA850_EMA_D_4, > + DA850_EMA_D_3, > + DA850_EMA_D_2, > + DA850_EMA_D_1, > + DA850_EMA_D_0, > + DA850_EMA_A_1, > + DA850_EMA_A_2, > + DA850_NEMA_CS_3, > + DA850_NEMA_CS_4, > + DA850_NEMA_WE, > + DA850_NEMA_OE, > }; > > #ifdef CONFIG_DAVINCI_MUX > -- > 1.5.6 > > _______________________________________________ > Davinci-linux-open-source mailing list > Davinci-linux-open-source@linux.davincidsp.com > http://linux.davincidsp.com/mailman/listinfo/davinci-linux-open-source
diff --git a/arch/arm/mach-davinci/board-da850-evm.c b/arch/arm/mach-davinci/board-da850-evm.c index ae4a2f0..5f3e45b 100644 --- a/arch/arm/mach-davinci/board-da850-evm.c +++ b/arch/arm/mach-davinci/board-da850-evm.c @@ -18,6 +18,10 @@ #include <linux/i2c.h> #include <linux/i2c/at24.h> #include <linux/gpio.h> +#include <linux/platform_device.h> +#include <linux/mtd/mtd.h> +#include <linux/mtd/nand.h> +#include <linux/mtd/partitions.h> #include <asm/mach-types.h> #include <asm/mach/arch.h> @@ -26,10 +30,81 @@ #include <mach/irqs.h> #include <mach/cp_intc.h> #include <mach/da8xx.h> +#include <mach/nand.h> #define DA850_EVM_PHY_MASK 0x1 #define DA850_EVM_MDIO_FREQUENCY 2200000 /* PHY bus frequency */ +#if defined(CONFIG_MTD_NAND_DAVINCI) || defined(CONFIG_MTD_NAND_DAVINCI_MODULE) +/* DA850/OMAP-L138 EVM includes a 512 MByte large-page NAND flash + * (128K blocks). It may be used instead of the (default) SPI flash + * to boot, using TI's tools to install the secondary boot loader + * (UBL) and U-Boot. + */ +struct mtd_partition da850_evm_nandflash_partition[] = { + { + .name = "u-boot env", + .offset = 0, + .size = SZ_128K, + .mask_flags = MTD_WRITEABLE, + }, + { + .name = "UBL", + .offset = MTDPART_OFS_APPEND, + .size = SZ_128K, + .mask_flags = MTD_WRITEABLE, + }, + { + .name = "u-boot", + .offset = MTDPART_OFS_APPEND, + .size = 4 * SZ_128K, + .mask_flags = MTD_WRITEABLE, + }, + { + .name = "kernel", + .offset = 0x200000, + .size = SZ_2M, + .mask_flags = 0, + }, + { + .name = "filesystem", + .offset = MTDPART_OFS_APPEND, + .size = MTDPART_SIZ_FULL, + .mask_flags = 0, + }, +}; + +static struct davinci_nand_pdata da850_evm_nandflash_data = { + .parts = da850_evm_nandflash_partition, + .nr_parts = ARRAY_SIZE(da850_evm_nandflash_partition), + .ecc_mode = NAND_ECC_HW, + .options = NAND_USE_FLASH_BBT, +}; + +static struct resource da850_evm_nandflash_resource[] = { + { + .start = DA8XX_AEMIF_CS3_BASE, + .end = DA8XX_AEMIF_CS3_BASE + SZ_512K + 2 * SZ_1K - 1, + .flags = IORESOURCE_MEM, + }, + { + .start = DA8XX_AEMIF_CTL_BASE, + .end = DA8XX_AEMIF_CTL_BASE + SZ_32K - 1, + .flags = IORESOURCE_MEM, + }, +}; + +static struct platform_device da850_evm_nandflash_device = { + .name = "davinci_nand", + .id = 1, + .dev = { + .platform_data = &da850_evm_nandflash_data, + }, + .num_resources = ARRAY_SIZE(da850_evm_nandflash_resource), + .resource = da850_evm_nandflash_resource, +}; +#endif + static struct davinci_i2c_platform_data da850_evm_i2c_0_pdata = { .bus_freq = 100, /* kHz */ .bus_delay = 0, /* usec */ @@ -39,6 +114,12 @@ static struct davinci_uart_config da850_evm_uart_config __initdata = { .enabled_uarts = 0x7, }; +static struct platform_device *da850_evm_devices[] __initdata = { +#if defined(CONFIG_MTD_NAND_DAVINCI) || defined(CONFIG_MTD_NAND_DAVINCI_MODULE) + &da850_evm_nandflash_device, +#endif +}; + #if defined(CONFIG_MMC_DAVINCI) || defined(CONFIG_MMC_DAVINCI_MODULE) static int da850_evm_mmc_get_ro(int index) { @@ -87,6 +168,16 @@ static __init void da850_evm_init(void) struct davinci_soc_info *soc_info = &davinci_soc_info; int ret; +#if defined(CONFIG_MTD_NAND_DAVINCI) || defined(CONFIG_MTD_NAND_DAVINCI_MODULE) + ret = da8xx_pinmux_setup(da850_nand_pins); + if (ret) + pr_warning("da850_evm_init: nand mux setup failed: %d\n", + ret); +#endif + + platform_add_devices(da850_evm_devices, + ARRAY_SIZE(da850_evm_devices)); + ret = da8xx_register_edma(); if (ret) pr_warning("da850_evm_init: edma registration failed: %d\n", @@ -120,6 +211,7 @@ static __init void da850_evm_init(void) if (ret) pr_warning("da830_evm_init: watchdog registration failed: %d\n", ret); + #if defined(CONFIG_MMC_DAVINCI) || defined(CONFIG_MMC_DAVINCI_MODULE) ret = da8xx_pinmux_setup(da850_mmcsd0_pins); if (ret) diff --git a/arch/arm/mach-davinci/da850.c b/arch/arm/mach-davinci/da850.c index 4b5ac24..a05077a 100644 --- a/arch/arm/mach-davinci/da850.c +++ b/arch/arm/mach-davinci/da850.c @@ -296,6 +296,13 @@ static struct clk mmcsd_clk = { .lpsc = DA8XX_LPSC0_MMC_SD, }; +static struct clk aemif_clk = { + .name = "aemif", + .parent = &pll0_sysclk3, + .lpsc = DA8XX_LPSC0_EMIF25, + .flags = ALWAYS_ENABLED, +}; + static struct davinci_clk da850_clks[] = { CLK(NULL, "ref", &ref_clk), CLK(NULL, "pll0", &pll0_clk), @@ -334,6 +341,7 @@ static struct davinci_clk da850_clks[] = { CLK(NULL, "rmii", &rmii_clk), CLK("davinci_emac.1", NULL, &emac_clk), CLK("davinci_mmc.0", NULL, &mmcsd_clk), + CLK(NULL, "aemif", &aemif_clk), CLK(NULL, NULL, NULL), }; @@ -387,6 +395,21 @@ static const struct mux_config da850_pins[] = { MUX_CFG(DA850, MMCSD0_DAT_3, 10, 20, 15, 2, false) MUX_CFG(DA850, MMCSD0_CLK, 10, 0, 15, 2, false) MUX_CFG(DA850, MMCSD0_CMD, 10, 4, 15, 2, false) + /* EMIF2.5/EMIFA function */ + MUX_CFG(DA850, EMA_D_7, 9, 0, 15, 1, false) + MUX_CFG(DA850, EMA_D_6, 9, 4, 15, 1, false) + MUX_CFG(DA850, EMA_D_5, 9, 8, 15, 1, false) + MUX_CFG(DA850, EMA_D_4, 9, 12, 15, 1, false) + MUX_CFG(DA850, EMA_D_3, 9, 16, 15, 1, false) + MUX_CFG(DA850, EMA_D_2, 9, 20, 15, 1, false) + MUX_CFG(DA850, EMA_D_1, 9, 24, 15, 1, false) + MUX_CFG(DA850, EMA_D_0, 9, 28, 15, 1, false) + MUX_CFG(DA850, EMA_A_1, 12, 24, 15, 1, false) + MUX_CFG(DA850, EMA_A_2, 12, 20, 15, 1, false) + MUX_CFG(DA850, NEMA_CS_3, 7, 4, 15, 1, false) + MUX_CFG(DA850, NEMA_CS_4, 7, 8, 15, 1, false) + MUX_CFG(DA850, NEMA_WE, 7, 16, 15, 1, false) + MUX_CFG(DA850, NEMA_OE, 7, 20, 15, 1, false) #endif }; @@ -430,6 +453,14 @@ const short da850_mmcsd0_pins[] __initdata = { -1 }; +const short da850_nand_pins[] __initdata = { + DA850_EMA_D_7, DA850_EMA_D_6, DA850_EMA_D_5, DA850_EMA_D_4, + DA850_EMA_D_3, DA850_EMA_D_2, DA850_EMA_D_1, DA850_EMA_D_0, + DA850_EMA_A_1, DA850_EMA_A_2, DA850_NEMA_CS_3, DA850_NEMA_CS_4, + DA850_NEMA_WE, DA850_NEMA_OE, + -1 +}; + /* FIQ are pri 0-1; otherwise 2-7, with 7 lowest priority */ static u8 da850_default_priorities[DA850_N_CP_INTC_IRQ] = { [IRQ_DA8XX_COMMTX] = 7, diff --git a/arch/arm/mach-davinci/include/mach/da8xx.h b/arch/arm/mach-davinci/include/mach/da8xx.h index e597900..aa08afe 100644 --- a/arch/arm/mach-davinci/include/mach/da8xx.h +++ b/arch/arm/mach-davinci/include/mach/da8xx.h @@ -38,6 +38,8 @@ #define DA8XX_GPIO_BASE 0x01e26000 #define DA8XX_PSC1_BASE 0x01e27000 #define DA8XX_MMCSD0_BASE 0x01c40000 +#define DA8XX_AEMIF_CS3_BASE 0x62000000 +#define DA8XX_AEMIF_CTL_BASE 0x68000000 #define PINMUX0 0x00 #define PINMUX1 0x04 @@ -104,6 +106,7 @@ extern const short da850_i2c0_pins[]; extern const short da850_i2c1_pins[]; extern const short da850_cpgmac_pins[]; extern const short da850_mmcsd0_pins[]; +extern const short da850_nand_pins[]; int da8xx_pinmux_setup(const short pins[]); diff --git a/arch/arm/mach-davinci/include/mach/mux.h b/arch/arm/mach-davinci/include/mach/mux.h index 09dbede..13bd634 100644 --- a/arch/arm/mach-davinci/include/mach/mux.h +++ b/arch/arm/mach-davinci/include/mach/mux.h @@ -757,6 +757,22 @@ enum davinci_da850_index { DA850_MMCSD0_DAT_3, DA850_MMCSD0_CLK, DA850_MMCSD0_CMD, + + /* EMIF2.5/EMIFA function */ + DA850_EMA_D_7, + DA850_EMA_D_6, + DA850_EMA_D_5, + DA850_EMA_D_4, + DA850_EMA_D_3, + DA850_EMA_D_2, + DA850_EMA_D_1, + DA850_EMA_D_0, + DA850_EMA_A_1, + DA850_EMA_A_2, + DA850_NEMA_CS_3, + DA850_NEMA_CS_4, + DA850_NEMA_WE, + DA850_NEMA_OE, }; #ifdef CONFIG_DAVINCI_MUX
This patch adds platform data for the 512MB NAND Flash found on DA850/OMAP-L138 EVM. Currently it supports only 1-bit ECC. Signed-off-by: Sudhakar Rajashekhara <sudhakar.raj@ti.com> --- This patch has been tested on DA850/OMAP-L138. This patch depends on the following two patches which I have submitted to davinci git: [PATCH] davinci: Add MMC/SD support for da850/omap-l138 [PATCH] davinci: Configure MDIO pins for EMAC arch/arm/mach-davinci/board-da850-evm.c | 92 ++++++++++++++++++++++++++++ arch/arm/mach-davinci/da850.c | 31 +++++++++ arch/arm/mach-davinci/include/mach/da8xx.h | 3 + arch/arm/mach-davinci/include/mach/mux.h | 16 +++++ 4 files changed, 142 insertions(+), 0 deletions(-)