Message ID | 1251903919-7320-1-git-send-email-miguel.aguilar@ridgerun.com (mailing list archive) |
---|---|
State | Changes Requested |
Headers | show |
miguel.aguilar@ridgerun.com writes: > From: Miguel Aguilar <miguel.aguilar@ridgerun.com> > > According to the application notes of the DM9000 v1.22 page 29, the driver > initializing steps are: first to power on the internal PHY and then to do > a software reset. > > This patch is needed by the DM355 Leopard Board to make the ethernet > work properly. > > Signed-off-by: Miguel Aguilar <miguel.aguilar@ridgerun.com> > Signed-off-by: Maria Rodriguez <maria.rodriguez@ridgerun.com> Since dm9000 is already an upstream driver, this patch needs to go to netdev@vger.kernel.org, and CC davinci list. Kevin > --- > drivers/net/dm9000.c | 19 +++++++++++++++++-- > drivers/net/dm9000.h | 4 ++++ > 2 files changed, 21 insertions(+), 2 deletions(-) > > diff --git a/drivers/net/dm9000.c b/drivers/net/dm9000.c > index dd771de..34ebbe9 100644 > --- a/drivers/net/dm9000.c > +++ b/drivers/net/dm9000.c > @@ -147,10 +147,25 @@ dm9000_reset(board_info_t * db) > { > dev_dbg(db->dev, "resetting device\n"); > > - /* RESET device */ > + /* Reset DM9000 */ > + /* see DM9000 Application Notes V1.22 Jun 11, 2004 page 29 */ > + > + /* DEBUG: Make all GPIO0 outputs, all others inputs */ > + writeb(DM9000_GPCR, db->io_addr); > + udelay(200); > + writeb(GPCR_GPIO0_OUT, db->io_data); > + udelay(200); > + > + /* Step 1: Power internal PHY by writing 0 to GPIO0 pin */ > + writeb(DM9000_GPR, db->io_addr); > + udelay(200); > + writeb(0, db->io_data); > + udelay(200); > + > + /* Step 2: Software reset */ > writeb(DM9000_NCR, db->io_addr); > udelay(200); > - writeb(NCR_RST, db->io_data); > + writeb(NCR_LBK_INT_MAC | NCR_RST, db->io_data); > udelay(200); > } > > diff --git a/drivers/net/dm9000.h b/drivers/net/dm9000.h > index ba25cf5..90d580a 100644 > --- a/drivers/net/dm9000.h > +++ b/drivers/net/dm9000.h > @@ -66,6 +66,8 @@ > #define NCR_FCOL (1<<4) > #define NCR_FDX (1<<3) > #define NCR_LBK (3<<1) > +#define NCR_LBK_INT_MAC (1<<1) > +#define NCR_LBK_INT_PHY (2<<1) > #define NCR_RST (1<<0) > > #define NSR_SPEED (1<<7) > @@ -131,6 +133,8 @@ > > #define GPCR_GEP_CNTL (1<<0) > > +#define GPCR_GPIO0_OUT (1<<0) > + > #define DM9000_PKT_RDY 0x01 /* Packet ready to receive */ > #define DM9000_PKT_MAX 1536 /* Received packet max size */ > > -- > 1.6.0.4 > > > _______________________________________________ > Davinci-linux-open-source mailing list > Davinci-linux-open-source@linux.davincidsp.com > http://linux.davincidsp.com/mailman/listinfo/davinci-linux-open-source
diff --git a/drivers/net/dm9000.c b/drivers/net/dm9000.c index dd771de..34ebbe9 100644 --- a/drivers/net/dm9000.c +++ b/drivers/net/dm9000.c @@ -147,10 +147,25 @@ dm9000_reset(board_info_t * db) { dev_dbg(db->dev, "resetting device\n"); - /* RESET device */ + /* Reset DM9000 */ + /* see DM9000 Application Notes V1.22 Jun 11, 2004 page 29 */ + + /* DEBUG: Make all GPIO0 outputs, all others inputs */ + writeb(DM9000_GPCR, db->io_addr); + udelay(200); + writeb(GPCR_GPIO0_OUT, db->io_data); + udelay(200); + + /* Step 1: Power internal PHY by writing 0 to GPIO0 pin */ + writeb(DM9000_GPR, db->io_addr); + udelay(200); + writeb(0, db->io_data); + udelay(200); + + /* Step 2: Software reset */ writeb(DM9000_NCR, db->io_addr); udelay(200); - writeb(NCR_RST, db->io_data); + writeb(NCR_LBK_INT_MAC | NCR_RST, db->io_data); udelay(200); } diff --git a/drivers/net/dm9000.h b/drivers/net/dm9000.h index ba25cf5..90d580a 100644 --- a/drivers/net/dm9000.h +++ b/drivers/net/dm9000.h @@ -66,6 +66,8 @@ #define NCR_FCOL (1<<4) #define NCR_FDX (1<<3) #define NCR_LBK (3<<1) +#define NCR_LBK_INT_MAC (1<<1) +#define NCR_LBK_INT_PHY (2<<1) #define NCR_RST (1<<0) #define NSR_SPEED (1<<7) @@ -131,6 +133,8 @@ #define GPCR_GEP_CNTL (1<<0) +#define GPCR_GPIO0_OUT (1<<0) + #define DM9000_PKT_RDY 0x01 /* Packet ready to receive */ #define DM9000_PKT_MAX 1536 /* Received packet max size */