@@ -34,6 +34,10 @@
#include <linux/i2c/pcf857x.h>
#include <linux/etherdevice.h>
#include <media/tvp514x.h>
+#include <linux/mtd/mtd.h>
+#include <linux/mtd/nand.h>
+#include <linux/mtd/partitions.h>
+
#include <asm/setup.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
@@ -45,6 +49,7 @@
#include <mach/psc.h>
#include <mach/serial.h>
#include <mach/i2c.h>
+#include <mach/nand.h>
#include <mach/mmc.h>
#include <mach/emac.h>
@@ -55,6 +60,18 @@
#define HAS_ATA 0
#endif
+#if defined(CONFIG_MTD_NAND_DAVINCI) || \
+ defined(CONFIG_MTD_NAND_DAVINCI_MODULE)
+#define HAS_NAND 1
+#else
+#define HAS_NAND 0
+#endif
+
+#define DAVINCI_ASYNC_EMIF_CONTROL_BASE 0x20008000
+#define DAVINCI_ASYNC_EMIF_DATA_CE0_BASE 0x42000000
+
+#define NAND_BLOCK_SIZE SZ_128K
+
/* CPLD Register 0 bits to control ATA */
#define DM646X_EVM_ATA_RST BIT(0)
#define DM646X_EVM_ATA_PWD BIT(1)
@@ -91,6 +108,69 @@ static struct davinci_uart_config uart_config __initdata = {
.enabled_uarts = (1 << 0),
};
+/* Note: The partitioning is driven by combination of UBL and U-Boot. For
+ * example, in the layout below, U-Boot puts environment in block 0
+ * and UBL can be in blocks 1-5 while U-Boot resides after UBL blocks.
+ */
+static struct mtd_partition davinci_nand_partitions[] = {
+ {
+ /* U-Boot environment */
+ .name = "params",
+ .offset = 0,
+ .size = 1 * NAND_BLOCK_SIZE,
+ .mask_flags = 0,
+ }, {
+ /* UBL, U-Boot */
+ .name = "bootloader",
+ .offset = MTDPART_OFS_APPEND,
+ .size = 10 * NAND_BLOCK_SIZE,
+ .mask_flags = MTD_WRITEABLE, /* force read-only */
+ }, {
+ .name = "kernel",
+ .offset = MTDPART_OFS_APPEND,
+ .size = SZ_4M,
+ .mask_flags = 0,
+ }, {
+ .name = "filesystem",
+ .offset = MTDPART_OFS_APPEND,
+ .size = MTDPART_SIZ_FULL,
+ .mask_flags = 0,
+ }
+};
+
+static struct davinci_nand_pdata davinci_nand_data = {
+ .mask_cle = 0x80000,
+ .mask_ale = 0x40000,
+ .parts = davinci_nand_partitions,
+ .nr_parts = ARRAY_SIZE(davinci_nand_partitions),
+ .ecc_mode = NAND_ECC_HW,
+ .options = 0,
+};
+
+static struct resource davinci_nand_resources[] = {
+ {
+ .start = DAVINCI_ASYNC_EMIF_DATA_CE0_BASE,
+ .end = DAVINCI_ASYNC_EMIF_DATA_CE0_BASE + SZ_32M - 1,
+ .flags = IORESOURCE_MEM,
+ }, {
+ .start = DAVINCI_ASYNC_EMIF_CONTROL_BASE,
+ .end = DAVINCI_ASYNC_EMIF_CONTROL_BASE + SZ_4K - 1,
+ .flags = IORESOURCE_MEM,
+ },
+};
+
+static struct platform_device davinci_nand_device = {
+ .name = "davinci_nand",
+ .id = 0,
+
+ .num_resources = ARRAY_SIZE(davinci_nand_resources),
+ .resource = davinci_nand_resources,
+
+ .dev = {
+ .platform_data = &davinci_nand_data,
+ },
+};
+
/* CPLD Register 0 Client: used for I/O Control */
static int cpld_reg0_probe(struct i2c_client *client,
const struct i2c_device_id *id)
@@ -645,6 +725,8 @@ static __init void evm_init(void)
dm646x_init_mcasp0(&dm646x_evm_snd_data[0]);
dm646x_init_mcasp1(&dm646x_evm_snd_data[1]);
+ platform_device_register(&davinci_nand_device);
+
if (HAS_ATA)
dm646x_init_ide();
This patch adds platform data and partition info for NAND on dm6467 EVM. Note that the partition layout is dependent on the UBL, U-Boot combination used. This patch uses partition organization suitable with latest U-Boot of LSP 1.3. For example, U-Boot environment goes in block 0, UBL resides in block form 1 to 5 and so on. Signed-off-by: Hemant Pedanekar <hemantp@ti.com> --- Depends on patch "[MTD] [NAND] davinci: fix to use mask_ale from pdata" submitted earlier. Without this patch "No NAND device found" error will be shown on dm6467-evm when booting with NAND enabled in config and NAND won't be accessible. arch/arm/mach-davinci/board-dm646x-evm.c | 82 ++++++++++++++++++++++++++++++ 1 files changed, 82 insertions(+), 0 deletions(-)