From patchwork Thu Sep 24 15:51:12 2009 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sekhar Nori X-Patchwork-Id: 49922 Received: from arroyo.ext.ti.com (arroyo.ext.ti.com [192.94.94.40]) by demeter.kernel.org (8.14.2/8.14.2) with ESMTP id n8OFrTLc009740 for ; Thu, 24 Sep 2009 15:53:29 GMT Received: from dlep33.itg.ti.com ([157.170.170.112]) by arroyo.ext.ti.com (8.13.7/8.13.7) with ESMTP id n8OFqJhs022386 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=NO); Thu, 24 Sep 2009 10:52:19 -0500 Received: from linux.omap.com (localhost [127.0.0.1]) by dlep33.itg.ti.com (8.13.7/8.13.7) with ESMTP id n8OFqJdv028297; Thu, 24 Sep 2009 10:52:19 -0500 (CDT) Received: from linux.omap.com (localhost [127.0.0.1]) by linux.omap.com (Postfix) with ESMTP id 377468064F; Thu, 24 Sep 2009 10:51:47 -0500 (CDT) X-Original-To: davinci-linux-open-source@linux.davincidsp.com Delivered-To: davinci-linux-open-source@linux.davincidsp.com Received: from dbdp31.itg.ti.com (dbdp31.itg.ti.com [172.24.170.98]) by linux.omap.com (Postfix) with ESMTP id 906AE80628 for ; Thu, 24 Sep 2009 10:51:16 -0500 (CDT) Received: from psplinux051.india.ti.com (localhost [127.0.0.1]) by dbdp31.itg.ti.com (8.13.8/8.13.8) with ESMTP id n8OFpEHS020583; Thu, 24 Sep 2009 21:21:14 +0530 (IST) Received: from psplinux051.india.ti.com (localhost [127.0.0.1]) by psplinux051.india.ti.com (8.13.1/8.13.1) with ESMTP id n8OFpEwj010093; Thu, 24 Sep 2009 21:21:14 +0530 Received: (from a0875516@localhost) by psplinux051.india.ti.com (8.13.1/8.13.1/Submit) id n8OFpESD010090; Thu, 24 Sep 2009 21:21:14 +0530 From: Sekhar Nori To: davinci-linux-open-source@linux.davincidsp.com Date: Thu, 24 Sep 2009 21:21:12 +0530 Message-Id: <1253807473-9997-3-git-send-email-nsekhar@ti.com> X-Mailer: git-send-email 1.6.2.4 In-Reply-To: <1253807473-9997-2-git-send-email-nsekhar@ti.com> References: <1253807473-9997-1-git-send-email-nsekhar@ti.com> <1253807473-9997-2-git-send-email-nsekhar@ti.com> Cc: Subject: [PATCH 3/4] davinci: DA8XX/OMAP-L1XX: add support for cpuidle driver register X-BeenThere: davinci-linux-open-source@linux.davincidsp.com X-Mailman-Version: 2.1.4 Precedence: list List-Id: davinci-linux-open-source.linux.davincidsp.com List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: davinci-linux-open-source-bounces@linux.davincidsp.com Errors-To: davinci-linux-open-source-bounces@linux.davincidsp.com This patch provides a function to help register cpuidle driver on da8xx/omap-l1xx platforms. Signed-off-by: Sekhar Nori --- arch/arm/mach-davinci/devices-da8xx.c | 26 ++++++++++++++++++++++++++ arch/arm/mach-davinci/include/mach/da8xx.h | 2 ++ 2 files changed, 28 insertions(+), 0 deletions(-) diff --git a/arch/arm/mach-davinci/devices-da8xx.c b/arch/arm/mach-davinci/devices-da8xx.c index dd0ea08..0ba6e5c 100644 --- a/arch/arm/mach-davinci/devices-da8xx.c +++ b/arch/arm/mach-davinci/devices-da8xx.c @@ -488,3 +488,29 @@ int da8xx_register_rtc(void) return platform_device_register(&da8xx_rtc_device); } + +static struct resource da8xx_cpuidle_resources[] = { + { + .start = DA8XX_DDR2_CTL_BASE, + .end = DA8XX_DDR2_CTL_BASE + SZ_32K - 1, + .flags = IORESOURCE_MEM, + }, +}; + +/* DA8XX devices support DDR2 power down */ +static int ddr2_pdown = 1; + +static struct platform_device da8xx_cpuidle_device = { + .name = "cpuidle-davinci", + .num_resources = ARRAY_SIZE(da8xx_cpuidle_resources), + .resource = da8xx_cpuidle_resources, + .dev = { + .platform_data = &ddr2_pdown, + }, +}; + +int __init da8xx_register_cpuidle(void) +{ + return platform_device_register(&da8xx_cpuidle_device); +} + diff --git a/arch/arm/mach-davinci/include/mach/da8xx.h b/arch/arm/mach-davinci/include/mach/da8xx.h index a152261..1de7957 100644 --- a/arch/arm/mach-davinci/include/mach/da8xx.h +++ b/arch/arm/mach-davinci/include/mach/da8xx.h @@ -49,6 +49,7 @@ extern void __iomem *da8xx_syscfg_base; #define DA8XX_AEMIF_CS2_BASE 0x60000000 #define DA8XX_AEMIF_CS3_BASE 0x62000000 #define DA8XX_AEMIF_CTL_BASE 0x68000000 +#define DA8XX_DDR2_CTL_BASE 0xb0000000 #define PINMUX0 0x00 #define PINMUX1 0x04 @@ -82,6 +83,7 @@ int da8xx_register_lcdc(struct da8xx_lcdc_platform_data *pdata); int da8xx_register_mmcsd0(struct davinci_mmc_config *config); void __init da8xx_register_mcasp(int id, struct snd_platform_data *pdata); int da8xx_register_rtc(void); +int da8xx_register_cpuidle(void); extern struct platform_device da8xx_serial_device; extern struct emac_platform_data da8xx_emac_pdata;