@@ -129,6 +129,37 @@ config MACH_DAVINCI_DA850_EVM
help
Say Y here to select the TI DA850/OMAP-L138 Evaluation Module.
+config DA850_UI_EXP
+ bool "DA850/OMAP-L138 UI (User Interface) board expander configuration"
+ depends on MACH_DAVINCI_DA850_EVM
+ select GPIO_PCA953X
+ help
+ Say Y here if you have the DA850/OMAP-L138 UI
+ (User Interface) board installed and you want to
+ enable the peripherals located on User Interface
+ board contorlled by TCA6416 expander.
+
+choice
+ prompt "Select peripherals connected to expander on UI board"
+ depends on DA850_UI_EXP
+
+config DA850_UI_NONE
+ bool "No peripheral is enabled"
+ help
+ Say Y if you do not want to enable any of the peripherals connected
+ to TCA6416 expander on DA850/OMAP-L138 EVM UI card
+
+config DA850_UI_RMII
+ bool "RMII Ethernet PHY"
+ help
+ Say Y if you want to use the RMII PHY on the DA850/OMAP-L138 EVM.
+ This PHY is found on the UI daughter card that is supplied with
+ the EVM.
+ NOTE: Please take care while choosing this option, MII PHY will
+ not be functional if RMII mode is selected.
+
+endchoice
+
config DAVINCI_MUX
bool "DAVINCI multiplexing support"
depends on ARCH_DAVINCI
@@ -44,6 +44,8 @@
#define DA850_MMCSD_CD_PIN GPIO_TO_PIN(4, 0)
#define DA850_MMCSD_WP_PIN GPIO_TO_PIN(4, 1)
+#define DA850_MII_MDIO_CLKEN_PIN GPIO_TO_PIN(2, 6)
+
static struct mtd_partition da850_evm_norflash_partition[] = {
{
.name = "NOR filesystem",
@@ -151,6 +153,7 @@ static void da850_evm_setup_nor_nand(void);
static int da850_evm_ui_expander_setup(struct i2c_client *client, unsigned gpio,
unsigned ngpio, void *c)
{
+ struct davinci_soc_info *soc_info = &davinci_soc_info;
int sel_a, sel_b, sel_c, ret;
sel_a = gpio + 7;
@@ -185,6 +188,10 @@ static int da850_evm_ui_expander_setup(struct i2c_client *client, unsigned gpio,
da850_evm_setup_nor_nand();
+ if (soc_info->emac_pdata->rmii_en)
+ /* enable RMII */
+ gpio_set_value(sel_a, 0);
+
return 0;
exp_setup_selc_fail:
@@ -361,11 +368,69 @@ static const short da850_evm_lcdc_pins[] = {
-1
};
+static int __init da850_evm_config_emac(u8 rmii_en)
+{
+ void __iomem *cfg_chip3_base;
+ int ret;
+ u32 val;
+
+ cfg_chip3_base = DA8XX_SYSCFG_VIRT(DA8XX_CFGCHIP3_REG);
+
+ /* configure the CFGCHIP3 register for RMII or MII */
+ val = __raw_readl(cfg_chip3_base);
+ if (rmii_en)
+ val |= BIT(8);
+ else
+ val &= ~BIT(8);
+
+ __raw_writel(val, cfg_chip3_base);
+
+ if (!rmii_en)
+ ret = da8xx_pinmux_setup(da850_cpgmac_pins);
+ else
+ ret = da8xx_pinmux_setup(da850_rmii_pins);
+ if (ret)
+ pr_warning("da850_evm_init: cpgmac/rmii mux setup failed: %d\n",
+ ret);
+
+ ret = davinci_cfg_reg(DA850_GPIO2_6);
+ if (ret)
+ pr_warning("da850_evm_init:GPIO(2,6) mux setup "
+ "failed\n");
+
+ ret = gpio_request(DA850_MII_MDIO_CLKEN_PIN, "mdio_clk_en");
+ if (ret) {
+ pr_warning("Cannot open GPIO %d\n",
+ DA850_MII_MDIO_CLKEN_PIN);
+ return ret;
+ }
+
+ if (rmii_en) {
+ /* Disable MII MDIO clock */
+ gpio_direction_output(DA850_MII_MDIO_CLKEN_PIN, 1);
+ pr_info("EMAC: RMII PHY configured, MII PHY will not be"
+ " functional\n");
+ } else {
+ /* Enable MII MDIO clock */
+ gpio_direction_output(DA850_MII_MDIO_CLKEN_PIN, 0);
+ pr_info("EMAC: MII PHY configured, RMII PHY will not be"
+ " functional\n");
+ }
+
+ return 0;
+}
+
static __init void da850_evm_init(void)
{
struct davinci_soc_info *soc_info = &davinci_soc_info;
int ret;
+#ifdef CONFIG_DA850_UI_RMII
+ soc_info->emac_pdata->rmii_en = 1;
+#else
+ soc_info->emac_pdata->rmii_en = 0;
+#endif
+
ret = da8xx_register_edma();
if (ret)
pr_warning("da850_evm_init: edma registration failed: %d\n",
@@ -383,12 +448,10 @@ static __init void da850_evm_init(void)
soc_info->emac_pdata->phy_mask = DA850_EVM_PHY_MASK;
soc_info->emac_pdata->mdio_max_freq = DA850_EVM_MDIO_FREQUENCY;
- soc_info->emac_pdata->rmii_en = 0;
- ret = da8xx_pinmux_setup(da850_cpgmac_pins);
+ ret = da850_evm_config_emac(soc_info->emac_pdata->rmii_en);
if (ret)
- pr_warning("da850_evm_init: cpgmac mux setup failed: %d\n",
- ret);
+ pr_warning("da850_evm_init: emac setup failed: %d\n", ret);
ret = da8xx_register_emac();
if (ret)
@@ -411,6 +411,14 @@ static const struct mux_config da850_pins[] = {
MUX_CFG(DA850, MII_RXD_0, 3, 28, 15, 8, false)
MUX_CFG(DA850, MDIO_CLK, 4, 0, 15, 8, false)
MUX_CFG(DA850, MDIO_D, 4, 4, 15, 8, false)
+ MUX_CFG(DA850, RMII_TXD_0, 14, 12, 15, 8, false)
+ MUX_CFG(DA850, RMII_TXD_1, 14, 8, 15, 8, false)
+ MUX_CFG(DA850, RMII_TXEN, 14, 16, 15, 8, false)
+ MUX_CFG(DA850, RMII_CRS_DV, 15, 4, 15, 8, false)
+ MUX_CFG(DA850, RMII_RXD_0, 14, 24, 15, 8, false)
+ MUX_CFG(DA850, RMII_RXD_1, 14, 20, 15, 8, false)
+ MUX_CFG(DA850, RMII_RXER, 14, 28, 15, 8, false)
+ MUX_CFG(DA850, RMII_MHZ_50_CLK, 15, 0, 15, 0, false)
/* McASP function */
MUX_CFG(DA850, ACLKR, 0, 0, 15, 1, false)
MUX_CFG(DA850, ACLKX, 0, 4, 15, 1, false)
@@ -513,6 +521,7 @@ static const struct mux_config da850_pins[] = {
MUX_CFG(DA850, EMA_WAIT_1, 6, 24, 15, 1, false)
MUX_CFG(DA850, NEMA_CS_2, 7, 0, 15, 1, false)
/* GPIO function */
+ MUX_CFG(DA850, GPIO2_6, 6, 4, 15, 8, false)
MUX_CFG(DA850, GPIO2_8, 5, 28, 15, 8, false)
MUX_CFG(DA850, GPIO2_15, 5, 0, 15, 8, false)
MUX_CFG(DA850, GPIO4_0, 10, 28, 15, 8, false)
@@ -554,6 +563,14 @@ const short da850_cpgmac_pins[] __initdata = {
-1
};
+const short da850_rmii_pins[] __initdata = {
+ DA850_RMII_TXD_0, DA850_RMII_TXD_1, DA850_RMII_TXEN,
+ DA850_RMII_CRS_DV, DA850_RMII_RXD_0, DA850_RMII_RXD_1,
+ DA850_RMII_RXER, DA850_RMII_MHZ_50_CLK, DA850_MDIO_CLK,
+ DA850_MDIO_D,
+ -1
+};
+
const short da850_mcasp_pins[] __initdata = {
DA850_AHCLKX, DA850_ACLKX, DA850_AFSX,
DA850_AHCLKR, DA850_ACLKR, DA850_AFSR, DA850_AMUTE,
@@ -122,6 +122,7 @@ extern const short da850_uart2_pins[];
extern const short da850_i2c0_pins[];
extern const short da850_i2c1_pins[];
extern const short da850_cpgmac_pins[];
+extern const short da850_rmii_pins[];
extern const short da850_mcasp_pins[];
extern const short da850_lcdcntl_pins[];
extern const short da850_mmcsd0_pins[];
@@ -774,6 +774,14 @@ enum davinci_da850_index {
DA850_MII_RXD_0,
DA850_MDIO_CLK,
DA850_MDIO_D,
+ DA850_RMII_TXD_0,
+ DA850_RMII_TXD_1,
+ DA850_RMII_TXEN,
+ DA850_RMII_CRS_DV,
+ DA850_RMII_RXD_0,
+ DA850_RMII_RXD_1,
+ DA850_RMII_RXER,
+ DA850_RMII_MHZ_50_CLK,
/* McASP function */
DA850_ACLKR,
@@ -881,6 +889,7 @@ enum davinci_da850_index {
DA850_NEMA_CS_2,
/* GPIO function */
+ DA850_GPIO2_6,
DA850_GPIO2_8,
DA850_GPIO2_15,
DA850_GPIO4_0,