From patchwork Fri Oct 16 19:09:15 2009 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kevin Hilman X-Patchwork-Id: 54390 Received: from comal.ext.ti.com (comal.ext.ti.com [198.47.26.152]) by demeter.kernel.org (8.14.2/8.14.2) with ESMTP id n9GJJwev013184 for ; Fri, 16 Oct 2009 19:19:59 GMT Received: from dlep35.itg.ti.com ([157.170.170.118]) by comal.ext.ti.com (8.13.7/8.13.7) with ESMTP id n9GJD5mq018205 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=NO); Fri, 16 Oct 2009 14:13:05 -0500 Received: from linux.omap.com (localhost [127.0.0.1]) by dlep35.itg.ti.com (8.13.7/8.13.7) with ESMTP id n9GJD4LO017035; Fri, 16 Oct 2009 14:13:04 -0500 (CDT) Received: from linux.omap.com (localhost [127.0.0.1]) by linux.omap.com (Postfix) with ESMTP id 0AD2580628; Fri, 16 Oct 2009 14:13:04 -0500 (CDT) X-Original-To: davinci-linux-open-source@linux.davincidsp.com Delivered-To: davinci-linux-open-source@linux.davincidsp.com Received: from dflp53.itg.ti.com (dflp53.itg.ti.com [128.247.5.6]) by linux.omap.com (Postfix) with ESMTP id E293680638 for ; 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Fri, 16 Oct 2009 19:11:04 +0000 (UTC) Received: from mail-ew0-f220.google.com (209.85.219.220) by VA3EHSMHS015.bigfish.com (10.7.99.25) with Microsoft SMTP Server id 14.0.482.32; Fri, 16 Oct 2009 19:11:02 +0000 Received: by mail-ew0-f220.google.com with SMTP id 20so2500484ewy.40 for ; Fri, 16 Oct 2009 12:11:01 -0700 (PDT) Received: by 10.216.86.148 with SMTP id w20mr771324wee.138.1255720261087; Fri, 16 Oct 2009 12:11:01 -0700 (PDT) Received: from localhost ([216.254.16.51]) by mx.google.com with ESMTPS id j8sm3128382gvb.4.2009.10.16.12.10.58 (version=TLSv1/SSLv3 cipher=RC4-MD5); Fri, 16 Oct 2009 12:11:00 -0700 (PDT) From: Kevin Hilman To: linux-arm-kernel@lists.infradead.org Date: Fri, 16 Oct 2009 12:09:15 -0700 Message-ID: <1255720190-7452-13-git-send-email-khilman@deeprootsystems.com> X-Mailer: git-send-email 1.6.4.3 In-Reply-To: <1255720190-7452-12-git-send-email-khilman@deeprootsystems.com> References: <1255720190-7452-1-git-send-email-khilman@deeprootsystems.com> <1255720190-7452-2-git-send-email-khilman@deeprootsystems.com> <1255720190-7452-3-git-send-email-khilman@deeprootsystems.com> <1255720190-7452-4-git-send-email-khilman@deeprootsystems.com> <1255720190-7452-5-git-send-email-khilman@deeprootsystems.com> <1255720190-7452-6-git-send-email-khilman@deeprootsystems.com> <1255720190-7452-7-git-send-email-khilman@deeprootsystems.com> <1255720190-7452-8-git-send-email-khilman@deeprootsystems.com> <1255720190-7452-9-git-send-email-khilman@deeprootsystems.com> <1255720190-7452-10-git-send-email-khilman@deeprootsystems.com> <1255720190-7452-11-git-send-email-khilman@deeprootsystems.com> <1255720190-7452-12-git-send-email-khilman@deeprootsystems.com> MIME-Version: 1.0 X-Reverse-DNS: mail-ew0-f220.google.com Cc: davinci-linux-open-source@linux.davincidsp.com Subject: [PATCH 11/46] davinci: make clock rate re-calculation easy X-BeenThere: davinci-linux-open-source@linux.davincidsp.com X-Mailman-Version: 2.1.4 Precedence: list List-Id: davinci-linux-open-source.linux.davincidsp.com List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: davinci-linux-open-source-bounces@linux.davincidsp.com Errors-To: davinci-linux-open-source-bounces@linux.davincidsp.com diff --git a/arch/arm/mach-davinci/clock.c b/arch/arm/mach-davinci/clock.c index f8c4ef0..6de1e34 100644 --- a/arch/arm/mach-davinci/clock.c +++ b/arch/arm/mach-davinci/clock.c @@ -135,8 +135,12 @@ int clk_register(struct clk *clk) if (clk->rate) return 0; + /* Else, see if there is a way to calculate it */ + if (clk->recalc) + clk->rate = clk->recalc(clk); + /* Otherwise, default to parent rate */ - if (clk->parent) + else if (clk->parent) clk->rate = clk->parent->rate; return 0; @@ -184,50 +188,62 @@ static int __init clk_disable_unused(void) late_initcall(clk_disable_unused); #endif -static void clk_sysclk_recalc(struct clk *clk) +static unsigned long clk_sysclk_recalc(struct clk *clk) { u32 v, plldiv; struct pll_data *pll; + unsigned long rate = clk->rate; /* If this is the PLL base clock, no more calculations needed */ if (clk->pll_data) - return; + return rate; if (WARN_ON(!clk->parent)) - return; + return rate; - clk->rate = clk->parent->rate; + rate = clk->parent->rate; /* Otherwise, the parent must be a PLL */ if (WARN_ON(!clk->parent->pll_data)) - return; + return rate; pll = clk->parent->pll_data; /* If pre-PLL, source clock is before the multiplier and divider(s) */ if (clk->flags & PRE_PLL) - clk->rate = pll->input_rate; + rate = pll->input_rate; if (!clk->div_reg) - return; + return rate; v = __raw_readl(pll->base + clk->div_reg); if (v & PLLDIV_EN) { plldiv = (v & PLLDIV_RATIO_MASK) + 1; if (plldiv) - clk->rate /= plldiv; + rate /= plldiv; } + + return rate; +} + +static unsigned long clk_leafclk_recalc(struct clk *clk) +{ + if (WARN_ON(!clk->parent)) + return clk->rate; + + return clk->parent->rate; } -static void __init clk_pll_init(struct clk *clk) +static unsigned long clk_pllclk_recalc(struct clk *clk) { u32 ctrl, mult = 1, prediv = 1, postdiv = 1; u8 bypass; struct pll_data *pll = clk->pll_data; + unsigned long rate = clk->rate; pll->base = IO_ADDRESS(pll->phys_base); ctrl = __raw_readl(pll->base + PLLCTL); - clk->rate = pll->input_rate = clk->parent->rate; + rate = pll->input_rate = clk->parent->rate; if (ctrl & PLLCTL_PLLEN) { bypass = 0; @@ -260,9 +276,9 @@ static void __init clk_pll_init(struct clk *clk) } if (!bypass) { - clk->rate /= prediv; - clk->rate *= mult; - clk->rate /= postdiv; + rate /= prediv; + rate *= mult; + rate /= postdiv; } pr_debug("PLL%d: input = %lu MHz [ ", @@ -275,7 +291,9 @@ static void __init clk_pll_init(struct clk *clk) pr_debug("* %d ", mult); if (postdiv > 1) pr_debug("/ %d ", postdiv); - pr_debug("] --> %lu MHz output.\n", clk->rate / 1000000); + pr_debug("] --> %lu MHz output.\n", rate / 1000000); + + return rate; } int __init davinci_clk_init(struct davinci_clk *clocks) @@ -286,12 +304,23 @@ int __init davinci_clk_init(struct davinci_clk *clocks) for (c = clocks; c->lk.clk; c++) { clk = c->lk.clk; - if (clk->pll_data) - clk_pll_init(clk); + if (!clk->recalc) { + + /* Check if clock is a PLL */ + if (clk->pll_data) + clk->recalc = clk_pllclk_recalc; + + /* Else, if it is a PLL-derived clock */ + else if (clk->flags & CLK_PLL) + clk->recalc = clk_sysclk_recalc; + + /* Otherwise, it is a leaf clock (PSC clock) */ + else if (clk->parent) + clk->recalc = clk_leafclk_recalc; + } - /* Calculate rates for PLL-derived clocks */ - else if (clk->flags & CLK_PLL) - clk_sysclk_recalc(clk); + if (clk->recalc) + clk->rate = clk->recalc(clk); if (clk->lpsc) clk->flags |= CLK_PSC; diff --git a/arch/arm/mach-davinci/clock.h b/arch/arm/mach-davinci/clock.h index f88794d..202b9ff 100644 --- a/arch/arm/mach-davinci/clock.h +++ b/arch/arm/mach-davinci/clock.h @@ -73,6 +73,7 @@ struct clk { struct list_head childnode; /* parent's child list node */ struct pll_data *pll_data; u32 div_reg; + unsigned long (*recalc) (struct clk *); }; /* Clock flags */