From patchwork Wed Jan 6 18:32:13 2010 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kevin Hilman X-Patchwork-Id: 71394 Received: from comal.ext.ti.com (comal.ext.ti.com [198.47.26.152]) by demeter.kernel.org (8.14.3/8.14.2) with ESMTP id o06Ih3KG014912 for ; Wed, 6 Jan 2010 18:43:03 GMT Received: from dlep36.itg.ti.com ([157.170.170.91]) by comal.ext.ti.com (8.13.7/8.13.7) with ESMTP id o06IfSjv013540 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=NO); Wed, 6 Jan 2010 12:41:28 -0600 Received: from linux.omap.com (localhost [127.0.0.1]) by dlep36.itg.ti.com (8.13.8/8.13.8) with ESMTP id o06IfRWd017209; Wed, 6 Jan 2010 12:41:27 -0600 (CST) Received: from linux.omap.com (localhost [127.0.0.1]) by linux.omap.com (Postfix) with ESMTP id 8AA168062D; Wed, 6 Jan 2010 12:41:27 -0600 (CST) X-Original-To: davinci-linux-open-source@linux.davincidsp.com Delivered-To: davinci-linux-open-source@linux.davincidsp.com Received: from dflp51.itg.ti.com (dflp51.itg.ti.com [128.247.22.94]) by linux.omap.com (Postfix) with ESMTP id F20F78062C for ; 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} +static inline void set_bits(int offset, int len, unsigned long *p) +{ + for (; len > 0; len--) + set_bit(offset + (len - 1), p); +} + +static inline void clear_bits(int offset, int len, unsigned long *p) +{ + for (; len > 0; len--) + clear_bit(offset + (len - 1), p); +} + /*****************************************************************************/ /* actual number of DMA channels and slots on this silicon */ @@ -1379,8 +1391,10 @@ static int __init edma_probe(struct platform_device *pdev) struct edma_soc_info *info = pdev->dev.platform_data; const s8 (*queue_priority_mapping)[2]; const s8 (*queue_tc_mapping)[2]; - int i, j, found = 0; + int i, j, off, ln, found = 0; int status = -1; + const s16 (*rsv_chans)[2]; + const s16 (*rsv_slots)[2]; int irq[EDMA_MAX_CC] = {0, 0}; int err_irq[EDMA_MAX_CC] = {0, 0}; struct resource *r[EDMA_MAX_CC] = {NULL}; @@ -1447,6 +1461,26 @@ static int __init edma_probe(struct platform_device *pdev) memset(edma_info[j]->edma_unused, 0xff, sizeof(edma_info[j]->edma_unused)); + /* Clear the reserved channels in unused list */ + rsv_chans = info[j].rsv_chans; + if (rsv_chans) { + for (i = 0; rsv_chans[i][0] != -1; i++) { + off = rsv_chans[i][0]; + ln = rsv_chans[i][1]; + clear_bits(off, ln, edma_info[j]->edma_unused); + } + } + + /* Set the reserved channels/slots in inuse list */ + rsv_slots = info[j].rsv_slots; + if (rsv_slots) { + for (i = 0; rsv_slots[i][0] != -1; i++) { + off = rsv_slots[i][0]; + ln = rsv_slots[i][1]; + set_bits(off, ln, edma_info[j]->edma_inuse); + } + } + sprintf(irq_name, "edma%d", j); irq[j] = platform_get_irq_byname(pdev, irq_name); edma_info[j]->irq_res_start = irq[j]; diff --git a/arch/arm/mach-davinci/include/mach/edma.h b/arch/arm/mach-davinci/include/mach/edma.h index ced3092..55e217e 100644 --- a/arch/arm/mach-davinci/include/mach/edma.h +++ b/arch/arm/mach-davinci/include/mach/edma.h @@ -280,6 +280,8 @@ struct edma_soc_info { unsigned n_cc; enum dma_event_q default_queue; + const s16 (*rsv_chans)[2]; + const s16 (*rsv_slots)[2]; const s8 (*queue_tc_mapping)[2]; const s8 (*queue_priority_mapping)[2]; };