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[09/14] Davinci: tnetv107x SOC specific header

Message ID 1269476345-16111-10-git-send-email-cyril@ti.com (mailing list archive)
State Superseded
Headers show

Commit Message

Cyril Chemparathy March 25, 2010, 12:19 a.m. UTC 
None
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Patch

diff --git a/arch/arm/mach-davinci/include/mach/tnetv107x.h b/arch/arm/mach-davinci/include/mach/tnetv107x.h
new file mode 100644
index 0000000..5b6c597
--- /dev/null
+++ b/arch/arm/mach-davinci/include/mach/tnetv107x.h
@@ -0,0 +1,74 @@ 
+/*
+ * Chip specific defines for TNETV107X SoC
+ *
+ * Author: Cyril Chemparathy <cyril@ti.com>
+ *
+ * 2009 (c) Texas Instruments, Inc. This file is licensed under
+ * the terms of the GNU General Public License version 2. This program
+ * is licensed "as is" without any warranty of any kind, whether express
+ * or implied.
+ */
+#ifndef __ASM_ARCH_DAVINCI_TNETV107X_H
+#define __ASM_ARCH_DAVINCI_TNETV107X_H
+
+/* Base addresses for on-chip devices */
+#define TNETV107X_TPCC_BASE			0x01c00000
+#define TNETV107X_TPTC0_BASE			0x01c10000
+#define TNETV107X_TPTC1_BASE			0x01c10400
+#define TNETV107X_INTC_BASE			0x03000000
+#define TNETV107X_LCD_CONTROLLER_BASE		0x08030000
+#define TNETV107X_INTD_BASE			0x08038000
+#define TNETV107X_INTD_IPC_BASE			0x08038000
+#define TNETV107X_INTD_FAST_BASE		0x08039000
+#define TNETV107X_INTD_ASYNC_BASE		0x0803a000
+#define TNETV107X_INTD_SLOW_BASE		0x0803b000
+#define TNETV107X_PKA_BASE			0x08040000
+#define TNETV107X_RNG_BASE			0x08044000
+#define TNETV107X_TIMER0_BASE			0x08086500
+#define TNETV107X_TIMER1_BASE			0x08086600
+#define TNETV107X_WDT0_ARM_BASE			0x08086700
+#define TNETV107X_WDT1_DSP_BASE			0x08086800
+#define TNETV107X_CHIP_CFG_BASE			0x08087000
+#define TNETV107X_GPIO_BASE			0x08088000
+#define TNETV107X_TOUCHSCREEN_BASE		0x08088500
+#define TNETV107X_SDIO0_BASE			0x08088700
+#define TNETV107X_SDIO1_BASE			0x08088800
+#define TNETV107X_MDIO_BASE			0x08088900
+#define TNETV107X_KEYPAD_BASE			0x08088a00
+#define TNETV107X_SSP_BASE			0x08088c00
+#define TNETV107X_CLOCK_CONTROL_BASE		0x0808a000
+#define TNETV107X_PSC_BASE			0x0808b000
+#define TNETV107X_TDM0_BASE			0x08100000
+#define TNETV107X_TDM1_BASE			0x08100100
+#define TNETV107X_MCDMA_BASE			0x08108000
+#define TNETV107X_UART0_DMA_BASE		0x08108200
+#define TNETV107X_USBSS_BASE			0x08120000
+#define TNETV107X_VLYNQ_CONTROL_BASE		0x0810d000
+#define TNETV107X_ASYNC_EMIF_CNTRL_BASE		0x08200000
+#define TNETV107X_VLYNQ_MEM_MAP_BASE		0x0c000000
+#define TNETV107X_IMCOP_BASE			0x01cc0000
+#define TNETV107X_MBX_LITE_BASE			0x07000000
+#define TNETV107X_ETHSS_BASE			0x0803c000
+#define TNETV107X_CPSW_BASE			0x0803c000
+#define TNETV107X_SPF_BASE			0x0803c800
+#define TNETV107X_IOPU_ETHSS_BASE		0x0803d000
+#define TNETV107X_VTP_CNTRL_0			0x0803d800
+#define TNETV107X_VTP_CNTRL_1			0x0803d900
+#define TNETV107X_UART2_DMA_BASE		0x08108400
+#define TNETV107X_ASYNC_EMIF_DATA_CE0_BASE	0x30000000
+#define TNETV107X_ASYNC_EMIF_DATA_CE1_BASE	0x40000000
+#define TNETV107X_ASYNC_EMIF_DATA_CE2_BASE	0x44000000
+#define TNETV107X_ASYNC_EMIF_DATA_CE3_BASE	0x48000000
+#define TNETV107X_DDR_BASE			0x80000000
+
+/* Boot Configuration Parameters */
+#define TNETV107X_KICK0		(TNETV107X_CHIP_CFG_BASE + 0x38)
+#define TNETV107X_KICK1		(TNETV107X_CHIP_CFG_BASE + 0x3c)
+#define TNETV107X_KICK0_MAGIC	0x83e70b13
+#define TNETV107X_KICK1_MAGIC	0x95a4f1e0
+
+#define TNETV107X_N_GPIOS	65
+
+#endif /* __ASM_ARCH_DAVINCI_TNETV107X_H */
+
+