From patchwork Thu Mar 25 21:43:54 2010 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Cyril Chemparathy X-Patchwork-Id: 88379 Received: from comal.ext.ti.com (comal.ext.ti.com [198.47.26.152]) by demeter.kernel.org (8.14.3/8.14.3) with ESMTP id o2PLn1Cg003874 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=OK) for ; Thu, 25 Mar 2010 21:49:37 GMT Received: from dlep35.itg.ti.com ([157.170.170.118]) by comal.ext.ti.com (8.13.7/8.13.7) with ESMTP id o2PLlDHG018100 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=NO); Thu, 25 Mar 2010 16:47:13 -0500 Received: from linux.omap.com (localhost [127.0.0.1]) by dlep35.itg.ti.com (8.13.7/8.13.7) with ESMTP id o2PLlAEO017859; Thu, 25 Mar 2010 16:47:11 -0500 (CDT) Received: from linux.omap.com (localhost [127.0.0.1]) by linux.omap.com (Postfix) with ESMTP id AEF8580639; Thu, 25 Mar 2010 15:46:45 -0600 (CST) X-Original-To: davinci-linux-open-source@linux.davincidsp.com Delivered-To: davinci-linux-open-source@linux.davincidsp.com Received: from dlep34.itg.ti.com (dlep34.itg.ti.com [157.170.170.115]) by linux.omap.com (Postfix) with ESMTP id C4BD98062B for ; Thu, 25 Mar 2010 15:44:05 -0600 (CST) Received: from legion.dal.design.ti.com (localhost [127.0.0.1]) by dlep34.itg.ti.com (8.13.7/8.13.7) with ESMTP id o2PLi2Lg011352; Thu, 25 Mar 2010 16:44:03 -0500 (CDT) Received: from gtloginvm01.gt.design.ti.com (gtloginvm01.gt.design.ti.com [158.218.108.144]) by legion.dal.design.ti.com (8.11.7p1+Sun/8.11.7) with ESMTP id o2PLi2Z27869; Thu, 25 Mar 2010 16:44:02 -0500 (CDT) Received: from gtloginvm01.gt.design.ti.com (localhost.localdomain [127.0.0.1]) by gtloginvm01.gt.design.ti.com (8.13.1/8.13.1) with ESMTP id o2PLi1ES015135; Thu, 25 Mar 2010 17:44:01 -0400 Received: (from a0875269@localhost) by gtloginvm01.gt.design.ti.com (8.13.1/8.13.1/Submit) id o2PLi1lX015132; Thu, 25 Mar 2010 17:44:01 -0400 From: Cyril Chemparathy To: davinci-linux-open-source@linux.davincidsp.com Subject: [PATCH v2 11/16] Davinci: tnetv107x edma definitions Date: Thu, 25 Mar 2010 17:43:54 -0400 Message-Id: <1269553439-14886-12-git-send-email-cyril@ti.com> X-Mailer: git-send-email 1.6.0.4 In-Reply-To: <1269553439-14886-11-git-send-email-cyril@ti.com> References: <1269553439-14886-1-git-send-email-cyril@ti.com> <1269553439-14886-2-git-send-email-cyril@ti.com> <1269553439-14886-3-git-send-email-cyril@ti.com> <1269553439-14886-4-git-send-email-cyril@ti.com> <1269553439-14886-5-git-send-email-cyril@ti.com> <1269553439-14886-6-git-send-email-cyril@ti.com> <1269553439-14886-7-git-send-email-cyril@ti.com> <1269553439-14886-8-git-send-email-cyril@ti.com> <1269553439-14886-9-git-send-email-cyril@ti.com> <1269553439-14886-10-git-send-email-cyril@ti.com> <1269553439-14886-11-git-send-email-cyril@ti.com> Cc: sshtylyov@mvista.com X-BeenThere: davinci-linux-open-source@linux.davincidsp.com X-Mailman-Version: 2.1.12 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: davinci-linux-open-source-bounces@linux.davincidsp.com Errors-To: davinci-linux-open-source-bounces@linux.davincidsp.com X-Greylist: Sender succeeded STARTTLS authentication, not delayed by milter-greylist-4.2.3 (demeter.kernel.org [140.211.167.41]); Thu, 25 Mar 2010 21:49:37 +0000 (UTC) diff --git a/arch/arm/mach-davinci/include/mach/edma.h b/arch/arm/mach-davinci/include/mach/edma.h index ced3092..e9d9fd2 100644 --- a/arch/arm/mach-davinci/include/mach/edma.h +++ b/arch/arm/mach-davinci/include/mach/edma.h @@ -187,6 +187,59 @@ enum DA830_edma_ch { DA830_DMACH_UART2_TX }; +/* TNETV107X specific EDMA3 information */ +#define EDMA_TNETV107X_NUM_DMACH 64 +#define EDMA_TNETV107X_NUM_TCC 64 +#define EDMA_TNETV107X_NUM_PARAMENTRY 128 +#define EDMA_TNETV107X_NUM_EVQUE 2 +#define EDMA_TNETV107X_NUM_TC 2 +#define EDMA_TNETV107X_CHMAP_EXIST 0 +#define EDMA_TNETV107X_NUM_REGIONS 4 +#define TNETV107X_DMACH2EVENT_MAP0 0x3C0CE000u +#define TNETV107X_DMACH2EVENT_MAP1 0x000FFFFFu + +/* TNETV107X specific EDMA3 Events Information */ +enum tnetv107x_edma_ch { + TNETV107X_DMACH_AES_DMAREQIN = 3, + TNETV107X_DMACH_AES_DMAREQOUT = 4, + TNETV107X_DMACH_DES_DMAREQIN = 5, + TNETV107X_DMACH_DES_DMAREQOUT = 6, + TNETV107X_DMACH_SHA = 7, + TNETV107X_DMACH_IMCOP_IMX = 8, + TNETV107X_DMACH_IMCOP_VLCD = 9, + TNETV107X_DMACH_IMCOP_SQR_ARM = 10, + TNETV107X_DMACH_IMCOP_SQR_DSP = 11, + TNETV107X_DMACH_PKA = 13, + TNETV107X_DMACH_MDIO = 14, + TNETV107X_DMACH_SSP = 15, + TNETV107X_DMACH_UART1_RX = 18, + TNETV107X_DMACH_UART1_TX = 19, + TNETV107X_DMACH_SDIO0_RX = 26, + TNETV107X_DMACH_SDIO0_TX = 27, + TNETV107X_DMACH_SDIO1_RX = 28, + TNETV107X_DMACH_SDIO1_TX = 29, + TNETV107X_DMACH_GPIO00 = 32, + TNETV107X_DMACH_GPIO01 = 33, + TNETV107X_DMACH_GPIO02 = 34, + TNETV107X_DMACH_GPIO03 = 35, + TNETV107X_DMACH_EXT0 = 44, + TNETV107X_DMACH_EXT1 = 45, + TNETV107X_DMACH_GPIO12 = 46, + TNETV107X_DMACH_GPIO13 = 47, + TNETV107X_DMACH_TIMER00 = 48, + TNETV107X_DMACH_TIMER01 = 49, + TNETV107X_DMACH_TIMER10 = 50, + TNETV107X_DMACH_TIMER11 = 51, + TNETV107X_DMACH_TDM0_RXDMA = 52, + TNETV107X_DMACH_TDM0_RXMCSP = 53, + TNETV107X_DMACH_TDM0_TXDMA = 54, + TNETV107X_DMACH_TDM0_TXMCSP = 55, + TNETV107X_DMACH_TDM1_RXDMA = 56, + TNETV107X_DMACH_TDM1_RXMCSP = 57, + TNETV107X_DMACH_TDM1_TXDMA = 58, + TNETV107X_DMACH_TDM1_TXMCSP = 59, +}; + /*ch_status paramater of callback function possible values*/ #define DMA_COMPLETE 1 #define DMA_CC_ERROR 2