From patchwork Thu May 6 23:24:09 2010 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kevin Hilman X-Patchwork-Id: 97485 Received: from bear.ext.ti.com (bear.ext.ti.com [192.94.94.41]) by demeter.kernel.org (8.14.3/8.14.3) with ESMTP id o46NVqP9007974 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=OK) for ; Thu, 6 May 2010 23:32:45 GMT Received: from dlep35.itg.ti.com ([157.170.170.118]) by bear.ext.ti.com (8.13.7/8.13.7) with ESMTP id o46NUNV9024328 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=NO); Thu, 6 May 2010 18:30:23 -0500 Received: from linux.omap.com (localhost [127.0.0.1]) by dlep35.itg.ti.com (8.13.7/8.13.7) with ESMTP id o46NUKPk000665; Thu, 6 May 2010 18:30:21 -0500 (CDT) Received: from linux.omap.com (localhost [127.0.0.1]) by linux.omap.com (Postfix) with ESMTP id 9A9F28063D; Thu, 6 May 2010 18:30:16 -0500 (CDT) X-Original-To: davinci-linux-open-source@linux.davincidsp.com Delivered-To: davinci-linux-open-source@linux.davincidsp.com Received: from dflp53.itg.ti.com (dflp53.itg.ti.com [128.247.5.6]) by linux.omap.com (Postfix) with ESMTP id 5C0C180626 for ; Thu, 6 May 2010 18:25:37 -0500 (CDT) Received: from neches.ext.ti.com (localhost [127.0.0.1]) by dflp53.itg.ti.com (8.13.8/8.13.8) with ESMTP id o46NPbSJ006085 for ; Thu, 6 May 2010 18:25:37 -0500 (CDT) Received: from psmtp.com (na3sys009amx168.postini.com [74.125.149.94]) by neches.ext.ti.com (8.13.7/8.13.7) with SMTP id o46NPa34002080 for ; Thu, 6 May 2010 18:25:36 -0500 Received: from source ([209.85.212.45]) by na3sys009amx168.postini.com ([74.125.148.10]) with SMTP; Thu, 06 May 2010 23:25:36 GMT Received: by mail-vw0-f45.google.com with SMTP id 15so54381vws.4 for ; Thu, 06 May 2010 16:25:36 -0700 (PDT) Received: by 10.220.108.34 with SMTP id d34mr3520511vcp.130.1273188335781; Thu, 06 May 2010 16:25:35 -0700 (PDT) Received: from localhost (deeprootsystems.com [216.254.16.51]) by mx.google.com with ESMTPS id z17sm6508810vco.5.2010.05.06.16.25.34 (version=TLSv1/SSLv3 cipher=RC4-MD5); Thu, 06 May 2010 16:25:35 -0700 (PDT) From: Kevin Hilman To: linux-arm-kernel@lists.infradead.org Subject: [PATCH 18/34] DA830 EVM: use DA8XX_AEMIF_*_BASE #define's Date: Thu, 6 May 2010 16:24:09 -0700 Message-Id: <1273188265-12782-19-git-send-email-khilman@deeprootsystems.com> X-Mailer: git-send-email 1.7.0.2 In-Reply-To: <1273188265-12782-1-git-send-email-khilman@deeprootsystems.com> References: <1273188265-12782-1-git-send-email-khilman@deeprootsystems.com> X-pstn-neptune: 0/0/0.00/0 X-pstn-levels: (S:96.75140/99.90000 CV:99.9000 FC:95.5390 LC:95.5390 R:95.9108 P:95.9108 M:97.0282 C:98.6951 ) X-pstn-settings: 2 (0.5000:0.5000) s cv gt3 gt2 gt1 r p m c X-pstn-addresses: from [db-null] Cc: davinci-linux-open-source@linux.davincidsp.com X-BeenThere: davinci-linux-open-source@linux.davincidsp.com X-Mailman-Version: 2.1.12 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: davinci-linux-open-source-bounces@linux.davincidsp.com Errors-To: davinci-linux-open-source-bounces@linux.davincidsp.com X-Greylist: Sender succeeded STARTTLS authentication, not delayed by milter-greylist-4.2.3 (demeter.kernel.org [140.211.167.41]); Thu, 06 May 2010 23:32:48 +0000 (UTC) diff --git a/arch/arm/mach-davinci/board-da830-evm.c b/arch/arm/mach-davinci/board-da830-evm.c index 9257056..8f079d2 100644 --- a/arch/arm/mach-davinci/board-da830-evm.c +++ b/arch/arm/mach-davinci/board-da830-evm.c @@ -33,9 +33,6 @@ #define DA830_EVM_PHY_MASK 0x0 #define DA830_EVM_MDIO_FREQUENCY 2200000 /* PHY bus frequency */ -#define DA830_EMIF25_ASYNC_DATA_CE3_BASE 0x62000000 -#define DA830_EMIF25_CONTROL_BASE 0x68000000 - /* * USB1 VBUS is controlled by GPIO1[15], over-current is reported on GPIO2[4]. */ @@ -375,13 +372,13 @@ static struct davinci_nand_pdata da830_evm_nand_pdata = { static struct resource da830_evm_nand_resources[] = { [0] = { /* First memory resource is NAND I/O window */ - .start = DA830_EMIF25_ASYNC_DATA_CE3_BASE, - .end = DA830_EMIF25_ASYNC_DATA_CE3_BASE + PAGE_SIZE - 1, + .start = DA8XX_AEMIF_CS3_BASE, + .end = DA8XX_AEMIF_CS3_BASE + PAGE_SIZE - 1, .flags = IORESOURCE_MEM, }, [1] = { /* Second memory resource is AEMIF control registers */ - .start = DA830_EMIF25_CONTROL_BASE, - .end = DA830_EMIF25_CONTROL_BASE + SZ_32K - 1, + .start = DA8XX_AEMIF_CTL_BASE, + .end = DA8XX_AEMIF_CTL_BASE + SZ_32K - 1, .flags = IORESOURCE_MEM, }, };