From patchwork Mon Jun 28 06:47:35 2010 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Raffaele Recalcati X-Patchwork-Id: 108624 Received: from devils.ext.ti.com (devils.ext.ti.com [198.47.26.153]) by demeter.kernel.org (8.14.4/8.14.3) with ESMTP id o5TDZQ6M016440 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=OK) for ; Tue, 29 Jun 2010 13:39:01 GMT Received: from dlep36.itg.ti.com ([157.170.170.91]) by devils.ext.ti.com (8.13.7/8.13.7) with ESMTP id o5TDY71D002159 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=NO); Tue, 29 Jun 2010 08:34:07 -0500 Received: from linux.omap.com (localhost [127.0.0.1]) by dlep36.itg.ti.com (8.13.8/8.13.8) with ESMTP id o5TDY6qN011669; Tue, 29 Jun 2010 08:34:06 -0500 (CDT) Received: from linux.omap.com (localhost [127.0.0.1]) by linux.omap.com (Postfix) with ESMTP id 516F480639; Tue, 29 Jun 2010 08:33:56 -0500 (CDT) X-Original-To: davinci-linux-open-source@linux.davincidsp.com Delivered-To: davinci-linux-open-source@linux.davincidsp.com Received: from dflp52.itg.ti.com (dflp52.itg.ti.com [128.247.22.96]) by linux.omap.com (Postfix) with ESMTP id A307480626 for ; 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Tue, 29 Jun 2010 13:39:02 +0000 (UTC) diff --git a/arch/arm/mach-davinci/dm365.c b/arch/arm/mach-davinci/dm365.c index a146849..42fd4a4 100644 --- a/arch/arm/mach-davinci/dm365.c +++ b/arch/arm/mach-davinci/dm365.c @@ -677,10 +677,12 @@ void __init dm365_init_spi0(unsigned chipselect_mask, davinci_cfg_reg(DM365_SPI0_SDO); /* not all slaves will be wired up */ - if (chipselect_mask & BIT(0)) - davinci_cfg_reg(DM365_SPI0_SDENA0); - if (chipselect_mask & BIT(1)) - davinci_cfg_reg(DM365_SPI0_SDENA1); + if (!((unsigned long) info->controller_data)) { + if (chipselect_mask & BIT(0)) + davinci_cfg_reg(DM365_SPI0_SDENA0); + if (chipselect_mask & BIT(1)) + davinci_cfg_reg(DM365_SPI0_SDENA1); + } spi_register_board_info(info, len); diff --git a/drivers/spi/davinci_spi.c b/drivers/spi/davinci_spi.c index 95afb6b..621ae46 100644 --- a/drivers/spi/davinci_spi.c +++ b/drivers/spi/davinci_spi.c @@ -29,6 +29,7 @@ #include #include +#include #include #include @@ -270,18 +271,26 @@ static void davinci_spi_chipselect(struct spi_device *spi, int value) pdata = davinci_spi->pdata; /* - * Board specific chip select logic decides the polarity and cs - * line for the controller - */ + * Board specific chip select logic decides the polarity and cs + * line for the controller + */ if (value == BITBANG_CS_INACTIVE) { - set_io_bits(davinci_spi->base + SPIDEF, CS_DEFAULT); - - data1_reg_val |= CS_DEFAULT << SPIDAT1_CSNR_SHIFT; - iowrite32(data1_reg_val, davinci_spi->base + SPIDAT1); - + if ((unsigned long) spi->controller_data) { + gpio_set_value(spi->controller_data, \ + !(spi->mode & SPI_CS_HIGH)); + } else { + set_io_bits(davinci_spi->base + SPIDEF, CS_DEFAULT); + + data1_reg_val |= CS_DEFAULT << SPIDAT1_CSNR_SHIFT; + iowrite32(data1_reg_val, davinci_spi->base + SPIDAT1); + } while ((ioread32(davinci_spi->base + SPIBUF) - & SPIBUF_RXEMPTY_MASK) == 0) + & SPIBUF_RXEMPTY_MASK) == 0) cpu_relax(); + } else { + if ((unsigned long) spi->controller_data) + gpio_set_value(spi->controller_data, \ + (spi->mode & SPI_CS_HIGH)); } }