@@ -63,6 +63,13 @@ struct snd_platform_data {
unsigned sram_size_playback;
unsigned sram_size_capture;
+ /*
+ * This define works when both clock and FS are output for the cpu
+ * and makes clock very fast (FS is not symmetrical, but sampling
+ * frequency is better approximated
+ */
+ bool i2s_fast_clock;
+
/* To be used when cpu gets clock from external pin */
int clk_input_pin;
@@ -150,6 +150,7 @@ struct davinci_mcbsp_dev {
*/
unsigned enable_channel_combine:1;
+ bool i2s_fast_clock;
unsigned int fmt;
int clk_div;
int clk_input_pin;
@@ -443,11 +444,23 @@ static int davinci_i2s_hw_params(struct snd_pcm_substream *substream,
DAVINCI_MCBSP_SRGR_CLKSM;
srgr |= DAVINCI_MCBSP_SRGR_FWID(mcbsp_word_length *
8 - 1);
- /* symmetric waveforms */
- clk_div = freq / (mcbsp_word_length * 16) /
- params->rate_num * params->rate_den;
- srgr |= DAVINCI_MCBSP_SRGR_FPER(mcbsp_word_length *
- 16 - 1);
+ if (dev->i2s_fast_clock) {
+ clk_div = 256;
+ do {
+ framesize = (freq / (--clk_div)) /
+ params->rate_num *
+ params->rate_den;
+ } while (((framesize < 33) || (framesize > 4095)) &&
+ (clk_div));
+ clk_div--;
+ srgr |= DAVINCI_MCBSP_SRGR_FPER(framesize - 1);
+ } else {
+ /* symmetric waveforms */
+ clk_div = freq / (mcbsp_word_length * 16) /
+ params->rate_num * params->rate_den;
+ srgr |= DAVINCI_MCBSP_SRGR_FPER(mcbsp_word_length *
+ 16 - 1);
+ }
clk_div &= 0xFF;
srgr |= clk_div;
break;
@@ -643,6 +656,7 @@ static int davinci_i2s_probe(struct platform_device *pdev)
pdata->sram_size_playback;
dev->dma_params[SNDRV_PCM_STREAM_CAPTURE].sram_size =
pdata->sram_size_capture;
+ dev->i2s_fast_clock = pdata->i2s_fast_clock;
dev->clk_input_pin = pdata->clk_input_pin;
}
dev->clk = clk_get(&pdev->dev, NULL);