From patchwork Mon Nov 29 07:13:02 2010 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Subhasish Ghosh X-Patchwork-Id: 362912 Received: from devils.ext.ti.com (devils.ext.ti.com [198.47.26.153]) by demeter1.kernel.org (8.14.4/8.14.3) with ESMTP id oAT74UHC006355 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=OK) for ; Mon, 29 Nov 2010 07:04:52 GMT Received: from dlep36.itg.ti.com ([157.170.170.91]) by devils.ext.ti.com (8.13.7/8.13.7) with ESMTP id oAT72afr030225 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=NO); Mon, 29 Nov 2010 01:02:38 -0600 Received: from linux.omap.com (localhost [127.0.0.1]) by dlep36.itg.ti.com (8.13.8/8.13.8) with ESMTP id oAT72Z9w011093; Mon, 29 Nov 2010 01:02:36 -0600 (CST) Received: from linux.omap.com (localhost [127.0.0.1]) by linux.omap.com (Postfix) with ESMTP id E1E0B80627; Mon, 29 Nov 2010 01:02:35 -0600 (CST) X-Original-To: davinci-linux-open-source@linux.davincidsp.com Delivered-To: davinci-linux-open-source@linux.davincidsp.com Received: from dflp53.itg.ti.com (dflp53.itg.ti.com [128.247.5.6]) by linux.omap.com (Postfix) with ESMTP id 4EF6480627 for ; Mon, 29 Nov 2010 01:02:33 -0600 (CST) Received: from white.ext.ti.com (localhost [127.0.0.1]) by dflp53.itg.ti.com (8.13.8/8.13.8) with ESMTP id oAT72Xqp025987 for ; Mon, 29 Nov 2010 01:02:33 -0600 (CST) Received: from psmtp.com (na3sys009amx179.postini.com [74.125.149.160]) by white.ext.ti.com (8.13.7/8.13.7) with SMTP id oAT72WI8029652 for ; Mon, 29 Nov 2010 01:02:32 -0600 Received: from source ([209.85.210.45]) by na3sys009amx179.postini.com ([74.125.148.10]) with SMTP; Mon, 29 Nov 2010 01:02:32 CST Received: by pzk2 with SMTP id 2so800264pzk.4 for ; Sun, 28 Nov 2010 23:02:32 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=gamma; h=domainkey-signature:received:received:from:to:cc:subject:date :message-id:x-mailer:in-reply-to:references; bh=L72GWhFtKXFjnrzgOkcHkZKhqnSNDdzCvBiJTh4iqvU=; b=wHkUGwp9kKPFaneFUFd3s2JcOpE5ubzReldNWvZhT5aIt9w9mLDlMvl9Sk3ID6MkMD SdpI2ymgcBzSPH6akxxZQ1O9Sp/BOZpO6KRrzca+0gxIBc/qVRWFhVo00YOhys31Fq0/ Tj+8OWNp124rQdZDEam+Y1WY7isOY7e4O46DE= DomainKey-Signature: a=rsa-sha1; c=nofws; d=gmail.com; s=gamma; h=from:to:cc:subject:date:message-id:x-mailer:in-reply-to:references; b=rIugEKkj2+UFJSpVsyItD5wHAgJ2wAF6ZP6wB7qpAkRS02VCOFBCETEA+HDqZZNkwu 10mVtygFzQJ+4DaGxPw8T4/Ae70ibIWs34h0ZhawMT/7zzhSdcGEjc2Tpoxvgs2yHY/L LBevVKNd5XJqCRx3GGbn/5gCAlhMjmv1qhmcY= Received: by 10.143.11.19 with SMTP id o19mr4944745wfi.100.1291014151062; Sun, 28 Nov 2010 23:02:31 -0800 (PST) Received: from localhost ([122.167.113.84]) by mx.google.com with ESMTPS id y42sm7071224wfd.22.2010.11.28.23.02.28 (version=TLSv1/SSLv3 cipher=RC4-MD5); Sun, 28 Nov 2010 23:02:30 -0800 (PST) From: Subhasish Ghosh To: davinci-linux-open-source@linux.davincidsp.com Subject: [RFC: PATCH 1/1] da850-evm: Support for TI's PRU CAN Emulation. Date: Mon, 29 Nov 2010 12:43:02 +0530 Message-Id: <1291014782-16124-2-git-send-email-subhasish@mistralsolutions.com> X-Mailer: git-send-email 1.7.2.3 In-Reply-To: <1291014782-16124-1-git-send-email-subhasish@mistralsolutions.com> References: <1291014782-16124-1-git-send-email-subhasish@mistralsolutions.com> X-pstn-neptune: 0/0/0.00/0 X-pstn-levels: (S:32.59149/99.90000 CV:99.9000 FC:95.5390 LC:95.5390 R:95.9108 P:95.9108 M:97.0282 C:98.6951 ) X-pstn-settings: 2 (0.5000:0.0750) s cv GT3 gt2 gt1 r p m c X-pstn-addresses: from [db-null] Cc: Subhasish Ghosh X-BeenThere: davinci-linux-open-source@linux.davincidsp.com X-Mailman-Version: 2.1.12 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: davinci-linux-open-source-bounces@linux.davincidsp.com Errors-To: davinci-linux-open-source-bounces@linux.davincidsp.com X-Greylist: Sender succeeded STARTTLS authentication, not delayed by milter-greylist-4.2.3 (demeter1.kernel.org [140.211.167.41]); Mon, 29 Nov 2010 07:04:52 +0000 (UTC) diff --git a/arch/arm/mach-davinci/board-da850-evm.c b/arch/arm/mach-davinci/board-da850-evm.c index f89b0b7..e907ef5 100644 --- a/arch/arm/mach-davinci/board-da850-evm.c +++ b/arch/arm/mach-davinci/board-da850-evm.c @@ -43,6 +43,7 @@ #define DA850_MMCSD_CD_PIN GPIO_TO_PIN(4, 0) #define DA850_MMCSD_WP_PIN GPIO_TO_PIN(4, 1) +#define DA850_PRU_CAN_TRX_PIN GPIO_TO_PIN(2, 0) #define DA850_MII_MDIO_CLKEN_PIN GPIO_TO_PIN(2, 6) @@ -188,6 +189,32 @@ static struct platform_device *da850_evm_devices[] __initdata = { &da850_evm_norflash_device, }; +static int __init da850_evm_setup_pru_can(void) +{ + int ret; + + if (!machine_is_davinci_da850_evm()) + return 0; + + ret = davinci_cfg_reg_list(da850_pru_can_pins); + if (ret) + pr_warning("da850_evm_init: da850_pru_can_pins mux setup" + "failed:%d\n", ret); + + ret = gpio_request(DA850_PRU_CAN_TRX_PIN, "pru_can_en"); + if (ret) + pr_warning("Cannot open GPIO %d\n", DA850_PRU_CAN_TRX_PIN); + + /* value = 0 to enable the can transceiver */ + gpio_direction_output(DA850_PRU_CAN_TRX_PIN, 0); + ret = da8xx_register_pru_can(); + if (ret) + pr_warning("da850_evm_init: pru can registration failed:" + "%d\n", ret); + return ret; +} +device_initcall(da850_evm_setup_pru_can); + #define DA8XX_AEMIF_CE2CFG_OFFSET 0x10 #define DA8XX_AEMIF_ASIZE_16BIT 0x1 diff --git a/arch/arm/mach-davinci/da850.c b/arch/arm/mach-davinci/da850.c index 63916b9..59a3638 100644 --- a/arch/arm/mach-davinci/da850.c +++ b/arch/arm/mach-davinci/da850.c @@ -238,6 +238,13 @@ static struct clk tptc2_clk = { .flags = ALWAYS_ENABLED, }; +static struct clk pru_clk = { + .name = "pru_ck", + .parent = &pll0_sysclk2, + .lpsc = DA8XX_LPSC0_DMAX, + .flags = ALWAYS_ENABLED, +}; + static struct clk uart0_clk = { .name = "uart0", .parent = &pll0_sysclk2, @@ -373,6 +380,7 @@ static struct clk_lookup da850_clks[] = { CLK(NULL, "tpcc1", &tpcc1_clk), CLK(NULL, "tptc2", &tptc2_clk), CLK(NULL, "uart0", &uart0_clk), + CLK(NULL, "pru_ck", &pru_clk), CLK(NULL, "uart1", &uart1_clk), CLK(NULL, "uart2", &uart2_clk), CLK(NULL, "aintc", &aintc_clk), @@ -390,12 +398,15 @@ static struct clk_lookup da850_clks[] = { CLK(NULL, NULL, NULL), }; -/* - * Device specific mux setup - * - * soc description mux mode mode mux dbg - * reg offset mask mode +/* soc -> DA850 + * desc -> Pin name, which evaluates to soc##_##desc. + * muxreg -> Pin Multiplexing Control n (PINMUXn) Register number. + * mode_offset -> Bit offset in the register PINMUXn. + * mode_mask -> Number of bits for Pin Multiplexing Control n. + * mux_mode -> Multiplexing mode to set. + * dbg -> debug on/off. */ + static const struct mux_config da850_pins[] = { #ifdef CONFIG_DAVINCI_MUX /* UART0 function */ @@ -514,7 +525,7 @@ static const struct mux_config da850_pins[] = { MUX_CFG(DA850, EMA_A_5, 12, 8, 15, 1, false) MUX_CFG(DA850, EMA_A_6, 12, 4, 15, 1, false) MUX_CFG(DA850, EMA_A_7, 12, 0, 15, 1, false) - MUX_CFG(DA850, EMA_A_8, 11, 28, 15, 1, false) + MUX_CFG(DA850, EMA_A_8, 11, 28, 15, 1, false) MUX_CFG(DA850, EMA_A_9, 11, 24, 15, 1, false) MUX_CFG(DA850, EMA_A_10, 11, 20, 15, 1, false) MUX_CFG(DA850, EMA_A_11, 11, 16, 15, 1, false) @@ -542,7 +553,12 @@ static const struct mux_config da850_pins[] = { MUX_CFG(DA850, EMA_CLK, 6, 0, 15, 1, false) MUX_CFG(DA850, EMA_WAIT_1, 6, 24, 15, 1, false) MUX_CFG(DA850, NEMA_CS_2, 7, 0, 15, 1, false) + /* PRU functions for soft can */ + MUX_CFG(DA850, PRU0_R31_0, 7, 28, 15, 0, false) + MUX_CFG(DA850, PRU1_R30_15, 12, 0, 15, 4, false) + MUX_CFG(DA850, PRU1_R31_18, 11, 20, 15, 0, false) /* GPIO function */ + MUX_CFG(DA850, GPIO2_0, 6, 28, 15, 8, false) MUX_CFG(DA850, GPIO2_6, 6, 4, 15, 8, false) MUX_CFG(DA850, GPIO2_8, 5, 28, 15, 8, false) MUX_CFG(DA850, GPIO2_15, 5, 0, 15, 8, false) @@ -557,6 +573,12 @@ const short da850_uart0_pins[] __initdata = { -1 }; +const short da850_pru_can_pins[] __initdata = { + DA850_GPIO2_0, DA850_PRU0_R31_0, DA850_PRU1_R30_15, + DA850_PRU1_R31_18, + -1 +}; + const short da850_uart1_pins[] __initdata = { DA850_UART1_RXD, DA850_UART1_TXD, -1 diff --git a/arch/arm/mach-davinci/devices-da8xx.c b/arch/arm/mach-davinci/devices-da8xx.c index 9eec630..11a9b67 100644 --- a/arch/arm/mach-davinci/devices-da8xx.c +++ b/arch/arm/mach-davinci/devices-da8xx.c @@ -14,6 +14,7 @@ #include #include #include +#include #include #include @@ -85,6 +86,42 @@ struct platform_device da8xx_serial_device = { }, }; +/* Info specific to OMAPL138 */ +#define OMAPL138_PRU_MEM_BASE 0x01C30000 +#define OMAPL138_INT_PRU_CAN IRQ_DA8XX_EVTOUT0 +static struct resource omapl138_pru_can_resources[] = { + { + .start = OMAPL138_PRU_MEM_BASE, + .end = OMAPL138_PRU_MEM_BASE + 0xFFFF, + .flags = IORESOURCE_MEM, + }, + { + .start = OMAPL138_INT_PRU_CAN, + .end = OMAPL138_INT_PRU_CAN, + .flags = IORESOURCE_IRQ, + }, +}; + +static struct platform_device omapl138_pru_can_device = { + .name = "davinci_pru_can", + .id = 1, + .num_resources = ARRAY_SIZE(omapl138_pru_can_resources), + .resource = omapl138_pru_can_resources, +}; + +/* Info specific to CAN conroller */ +#define OMAPL138_PRU_CAN_VERSION 1 + +static struct ti_pru_can_platform_data ti_pru_can_pdata = { + .version = OMAPL138_PRU_CAN_VERSION, +}; + +int __init da8xx_register_pru_can(void) +{ + omapl138_pru_can_device.dev.platform_data = &ti_pru_can_pdata; + return platform_device_register(&omapl138_pru_can_device); +} + static const s8 da8xx_queue_tc_mapping[][2] = { /* {event queue no, TC no} */ {0, 0}, diff --git a/arch/arm/mach-davinci/include/mach/da8xx.h b/arch/arm/mach-davinci/include/mach/da8xx.h index 4247b3f..3e88676 100644 --- a/arch/arm/mach-davinci/include/mach/da8xx.h +++ b/arch/arm/mach-davinci/include/mach/da8xx.h @@ -74,6 +74,7 @@ int da8xx_register_watchdog(void); int da8xx_register_usb20(unsigned mA, unsigned potpgt); int da8xx_register_usb11(struct da8xx_ohci_root_hub *pdata); int da8xx_register_emac(void); +int da8xx_register_pru_can(void); int da8xx_register_lcdc(struct da8xx_lcdc_platform_data *pdata); int da8xx_register_mmcsd0(struct davinci_mmc_config *config); int da850_register_mmcsd1(struct davinci_mmc_config *config); @@ -122,6 +123,7 @@ extern const short da850_uart2_pins[]; extern const short da850_i2c0_pins[]; extern const short da850_i2c1_pins[]; extern const short da850_cpgmac_pins[]; +extern const short da850_pru_can_pins[]; extern const short da850_mcasp_pins[]; extern const short da850_lcdcntl_pins[]; extern const short da850_mmcsd0_pins[]; diff --git a/arch/arm/mach-davinci/include/mach/mux.h b/arch/arm/mach-davinci/include/mach/mux.h index de11aac..1f1fb64 100644 --- a/arch/arm/mach-davinci/include/mach/mux.h +++ b/arch/arm/mach-davinci/include/mach/mux.h @@ -906,8 +906,13 @@ enum davinci_da850_index { DA850_EMA_CLK, DA850_EMA_WAIT_1, DA850_NEMA_CS_2, + /* PRU I/O */ + DA850_PRU0_R31_0, + DA850_PRU1_R30_15, + DA850_PRU1_R31_18, /* GPIO function */ + DA850_GPIO2_0, DA850_GPIO2_6, DA850_GPIO2_8, DA850_GPIO2_15, diff --git a/include/linux/can/platform/ti_omapl_pru_can.h b/include/linux/can/platform/ti_omapl_pru_can.h new file mode 100644 index 0000000..0dea436 --- /dev/null +++ b/include/linux/can/platform/ti_omapl_pru_can.h @@ -0,0 +1,29 @@ +/* + * TI OMAPL PRU CAN Emulation device driver + * + * This driver supports TI's PRU CAN Emulation and the + * + * Copyright (C) 2009 Texas Instruments Incorporated - http://www.ti.com/ + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation version 2. + * + * This program is distributed as is WITHOUT ANY WARRANTY of any + * kind, whether express or implied; without even the implied warranty + * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + + +/** + * struct ti_pru_can_platform_data - PRU CAN platform data + * + * @version: version for future use + * + * Platform data structure to get all platform specific settings. + */ + +struct ti_pru_can_platform_data { + u32 version; +};