@@ -238,6 +238,12 @@ static struct clk tptc2_clk = {
.flags = ALWAYS_ENABLED,
};
+static struct clk pru_clk = {
+ .name = "pru_ck",
+ .parent = &pll0_sysclk2,
+ .lpsc = DA8XX_LPSC0_DMAX,
+};
+
static struct clk uart0_clk = {
.name = "uart0",
.parent = &pll0_sysclk2,
@@ -373,6 +379,7 @@ static struct clk_lookup da850_clks[] = {
CLK(NULL, "tpcc1", &tpcc1_clk),
CLK(NULL, "tptc2", &tptc2_clk),
CLK(NULL, "uart0", &uart0_clk),
+ CLK(NULL, "pru_ck", &pru_clk),
CLK(NULL, "uart1", &uart1_clk),
CLK(NULL, "uart2", &uart2_clk),
CLK(NULL, "aintc", &aintc_clk),
@@ -542,7 +549,12 @@ static const struct mux_config da850_pins[] = {
MUX_CFG(DA850, EMA_CLK, 6, 0, 15, 1, false)
MUX_CFG(DA850, EMA_WAIT_1, 6, 24, 15, 1, false)
MUX_CFG(DA850, NEMA_CS_2, 7, 0, 15, 1, false)
+ /* PRU functions for soft CAN */
+ MUX_CFG(DA850, PRU0_R31_0, 7, 28, 15, 0, false)
+ MUX_CFG(DA850, PRU1_R30_15, 12, 0, 15, 4, false)
+ MUX_CFG(DA850, PRU1_R31_18, 11, 20, 15, 0, false)
/* GPIO function */
+ MUX_CFG(DA850, GPIO2_0, 6, 28, 15, 8, false)
MUX_CFG(DA850, GPIO2_6, 6, 4, 15, 8, false)
MUX_CFG(DA850, GPIO2_8, 5, 28, 15, 8, false)
MUX_CFG(DA850, GPIO2_15, 5, 0, 15, 8, false)
@@ -85,6 +85,35 @@ struct platform_device da8xx_serial_device = {
},
};
+/* Info specific to OMAPL138 */
+#define OMAPL138_PRU_MEM_BASE 0x01C30000
+#define OMAPL138_INT_PRU_CAN IRQ_DA8XX_EVTOUT0
+static struct resource omapl138_pru_can_resources[] = {
+ {
+ .start = OMAPL138_PRU_MEM_BASE,
+ .end = OMAPL138_PRU_MEM_BASE + 0xFFFF,
+ .flags = IORESOURCE_MEM,
+ },
+ {
+ .start = OMAPL138_INT_PRU_CAN,
+ .end = OMAPL138_INT_PRU_CAN,
+ .flags = IORESOURCE_IRQ,
+ },
+};
+
+/* Info specific to CAN conroller */
+static struct platform_device omapl138_pru_can_device = {
+ .name = "davinci_pru_can",
+ .id = -1,
+ .num_resources = ARRAY_SIZE(omapl138_pru_can_resources),
+ .resource = omapl138_pru_can_resources,
+};
+
+int __init da8xx_register_pru_can(void)
+{
+ return platform_device_register(&omapl138_pru_can_device);
+}
+
static const s8 da8xx_queue_tc_mapping[][2] = {
/* {event queue no, TC no} */
{0, 0},
@@ -74,6 +74,7 @@ int da8xx_register_watchdog(void);
int da8xx_register_usb20(unsigned mA, unsigned potpgt);
int da8xx_register_usb11(struct da8xx_ohci_root_hub *pdata);
int da8xx_register_emac(void);
+int da8xx_register_pru_can(void);
int da8xx_register_lcdc(struct da8xx_lcdc_platform_data *pdata);
int da8xx_register_mmcsd0(struct davinci_mmc_config *config);
int da850_register_mmcsd1(struct davinci_mmc_config *config);
@@ -122,6 +123,7 @@ extern const short da850_uart2_pins[];
extern const short da850_i2c0_pins[];
extern const short da850_i2c1_pins[];
extern const short da850_cpgmac_pins[];
+extern const short da850_pru_can_pins[];
extern const short da850_mcasp_pins[];
extern const short da850_lcdcntl_pins[];
extern const short da850_mmcsd0_pins[];
@@ -906,8 +906,13 @@ enum davinci_da850_index {
DA850_EMA_CLK,
DA850_EMA_WAIT_1,
DA850_NEMA_CS_2,
+ /* PRU I/O */
+ DA850_PRU0_R31_0,
+ DA850_PRU1_R30_15,
+ DA850_PRU1_R31_18,
/* GPIO function */
+ DA850_GPIO2_0,
DA850_GPIO2_6,
DA850_GPIO2_8,
DA850_GPIO2_15,