@@ -5,7 +5,7 @@
# Common objects
obj-y := time.o clock.o serial.o io.o psc.o \
- gpio.o dma.o usb.o common.o sram.o aemif.o
+ gpio.o dma.o usb.o common.o sram.o aemif.o pru.o
obj-$(CONFIG_DAVINCI_MUX) += mux.o
@@ -238,6 +238,12 @@ static struct clk tptc2_clk = {
.flags = ALWAYS_ENABLED,
};
+static struct clk pru_clk = {
+ .name = "pruss",
+ .parent = &pll0_sysclk2,
+ .lpsc = DA8XX_LPSC0_DMAX,
+};
+
static struct clk uart0_clk = {
.name = "uart0",
.parent = &pll0_sysclk2,
@@ -318,6 +324,14 @@ static struct clk mcasp_clk = {
.flags = DA850_CLK_ASYNC3,
};
+static struct clk mcasp_pru_clk = {
+ .name = "mcasp_pru",
+ .parent = &pll0_sysclk2,
+ .lpsc = DA8XX_LPSC1_McASP0,
+ .gpsc = 1,
+ .flags = DA850_CLK_ASYNC3,
+};
+
static struct clk lcdc_clk = {
.name = "lcdc",
.parent = &pll0_sysclk2,
@@ -373,6 +387,7 @@ static struct clk_lookup da850_clks[] = {
CLK(NULL, "tpcc1", &tpcc1_clk),
CLK(NULL, "tptc2", &tptc2_clk),
CLK(NULL, "uart0", &uart0_clk),
+ CLK(NULL, "pruss", &pru_clk),
CLK(NULL, "uart1", &uart1_clk),
CLK(NULL, "uart2", &uart2_clk),
CLK(NULL, "aintc", &aintc_clk),
@@ -381,6 +396,7 @@ static struct clk_lookup da850_clks[] = {
CLK(NULL, "emif3", &emif3_clk),
CLK(NULL, "arm", &arm_clk),
CLK(NULL, "rmii", &rmii_clk),
+ CLK(NULL, "mcasp_pru", &mcasp_pru_clk),
CLK("davinci_emac.1", NULL, &emac_clk),
CLK("davinci-mcasp.0", NULL, &mcasp_clk),
CLK("da8xx_lcdc.0", NULL, &lcdc_clk),
@@ -85,7 +85,90 @@ struct platform_device da8xx_serial_device = {
},
};
-static const s8 da8xx_queue_tc_mapping[][2] = {
+
+#define OMAPL138_PRU_MEM_BASE 0x01C30000
+
+#define OMAPL138_INT_PRU_SUART_1 IRQ_DA8XX_EVTOUT0
+#define OMAPL138_INT_PRU_SUART_2 IRQ_DA8XX_EVTOUT1
+#define OMAPL138_INT_PRU_SUART_3 IRQ_DA8XX_EVTOUT2
+#define OMAPL138_INT_PRU_SUART_4 IRQ_DA8XX_EVTOUT3
+#define OMAPL138_INT_PRU_SUART_5 IRQ_DA8XX_EVTOUT4
+#define OMAPL138_INT_PRU_SUART_6 IRQ_DA8XX_EVTOUT5
+#define OMAPL138_INT_PRU_SUART_7 IRQ_DA8XX_EVTOUT6
+#define OMAPL138_INT_PRU_SUART_8 IRQ_DA8XX_EVTOUT7
+
+static struct resource omapl138_pru_suart_resources[] = {
+ {
+ .name = "omapl_pru_suart",
+ .start = OMAPL138_PRU_MEM_BASE,
+ .end = OMAPL138_PRU_MEM_BASE + 0xFFFF,
+ .flags = IORESOURCE_MEM,
+ },
+ {
+ .start = DAVINCI_DA8XX_MCASP0_REG_BASE,
+ .end = DAVINCI_DA8XX_MCASP0_REG_BASE + (SZ_1K * 12) - 1,
+ .flags = IORESOURCE_MEM,
+ },
+ {
+ .start = DA8XX_SHARED_RAM_BASE,
+ .end = DA8XX_SHARED_RAM_BASE + (SZ_1K * 8) - 1,
+ .flags = IORESOURCE_MEM,
+ },
+ {
+ .start = OMAPL138_INT_PRU_SUART_1,
+ .end = OMAPL138_INT_PRU_SUART_1,
+ .flags = IORESOURCE_IRQ,
+ },
+ {
+ .start = OMAPL138_INT_PRU_SUART_2,
+ .end = OMAPL138_INT_PRU_SUART_2,
+ .flags = IORESOURCE_IRQ,
+ },
+ {
+ .start = OMAPL138_INT_PRU_SUART_3,
+ .end = OMAPL138_INT_PRU_SUART_3,
+ .flags = IORESOURCE_IRQ,
+ },
+ {
+ .start = OMAPL138_INT_PRU_SUART_4,
+ .end = OMAPL138_INT_PRU_SUART_4,
+ .flags = IORESOURCE_IRQ,
+ },
+ {
+ .start = OMAPL138_INT_PRU_SUART_5,
+ .end = OMAPL138_INT_PRU_SUART_5,
+ .flags = IORESOURCE_IRQ,
+ },
+ {
+ .start = OMAPL138_INT_PRU_SUART_6,
+ .end = OMAPL138_INT_PRU_SUART_6,
+ .flags = IORESOURCE_IRQ,
+ },
+ {
+ .start = OMAPL138_INT_PRU_SUART_7,
+ .end = OMAPL138_INT_PRU_SUART_7,
+ .flags = IORESOURCE_IRQ,
+ },
+ {
+ .start = OMAPL138_INT_PRU_SUART_8,
+ .end = OMAPL138_INT_PRU_SUART_8,
+ .flags = IORESOURCE_IRQ,
+ },
+};
+
+struct platform_device omapl_pru_suart_device = {
+ .name = "davinci_pru_suart",
+ .id = -1,
+ .num_resources = ARRAY_SIZE(omapl138_pru_suart_resources),
+ .resource = omapl138_pru_suart_resources,
+};
+
+int __init da8xx_register_pru_suart(void)
+{
+ return platform_device_register(&omapl_pru_suart_device);
+}
+
+static const s8 da8xx_queue_tc_mapping[][2] = {
/* {event queue no, TC no} */
{0, 0},
{1, 1},
@@ -81,6 +81,7 @@ int da8xx_register_watchdog(void);
int da8xx_register_usb20(unsigned mA, unsigned potpgt);
int da8xx_register_usb11(struct da8xx_ohci_root_hub *pdata);
int da8xx_register_emac(void);
+int da8xx_register_pru_suart(void);
int da8xx_register_lcdc(struct da8xx_lcdc_platform_data *pdata);
int da8xx_register_mmcsd0(struct davinci_mmc_config *config);
int da850_register_mmcsd1(struct davinci_mmc_config *config);
@@ -22,6 +22,7 @@
**************************************************************************/
#define DAVINCI_DDR_BASE 0x80000000
#define DA8XX_DDR_BASE 0xc0000000
+#define DA8XX_SHARED_RAM_BASE 0x80000000
#if defined(CONFIG_ARCH_DAVINCI_DA8XX) && defined(CONFIG_ARCH_DAVINCI_DMx)
#error Cannot enable DaVinci and DA8XX platforms concurrently