From patchwork Tue Feb 1 00:05:14 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Michael Williamson X-Patchwork-Id: 521741 Received: from devils.ext.ti.com (devils.ext.ti.com [198.47.26.153]) by demeter1.kernel.org (8.14.4/8.14.3) with ESMTP id p110AFXJ005575 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=OK) for ; Tue, 1 Feb 2011 00:10:36 GMT Received: from dlep34.itg.ti.com ([157.170.170.115]) by devils.ext.ti.com (8.13.7/8.13.7) with ESMTP id p1106U1S004432 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=NO); Mon, 31 Jan 2011 18:06:30 -0600 Received: from linux.omap.com (localhost [127.0.0.1]) by dlep34.itg.ti.com (8.13.7/8.13.7) with ESMTP id p1106RlO004715; Mon, 31 Jan 2011 18:06:28 -0600 (CST) Received: from linux.omap.com (localhost [127.0.0.1]) by linux.omap.com (Postfix) with ESMTP id 16BF280666; Mon, 31 Jan 2011 18:06:14 -0600 (CST) X-Original-To: davinci-linux-open-source@linux.davincidsp.com Delivered-To: davinci-linux-open-source@linux.davincidsp.com Received: from dflp52.itg.ti.com (dflp52.itg.ti.com [128.247.22.96]) by linux.omap.com (Postfix) with ESMTP id 5B75580635 for ; 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Tue, 01 Feb 2011 00:10:38 +0000 (UTC) diff --git a/arch/arm/mach-davinci/board-mityomapl138.c b/arch/arm/mach-davinci/board-mityomapl138.c index 0ea5932..9dd88d7 100644 --- a/arch/arm/mach-davinci/board-mityomapl138.c +++ b/arch/arm/mach-davinci/board-mityomapl138.c @@ -17,6 +17,8 @@ #include #include #include +#include +#include #include #include @@ -25,6 +27,7 @@ #include #include #include +#include #define MITYOMAPL138_PHY_ID "0:03" @@ -294,6 +297,104 @@ static int __init pmic_tps65023_init(void) } /* + * SPI Devices: + * SPI1_CS0: 8M Flash ST-M25P64-VME6G + */ +static struct mtd_partition spi_flash_partitions[] = { + [0] = { + .name = "ubl", + .offset = 0, + .size = SZ_64K, + .mask_flags = MTD_WRITEABLE, + }, + [1] = { + .name = "u-boot", + .offset = MTDPART_OFS_APPEND, + .size = SZ_512K, + .mask_flags = MTD_WRITEABLE, + }, + [2] = { + .name = "u-boot-env", + .offset = MTDPART_OFS_APPEND, + .size = SZ_64K, + .mask_flags = MTD_WRITEABLE, + }, + [3] = { + .name = "periph-config", + .offset = MTDPART_OFS_APPEND, + .size = SZ_64K, + .mask_flags = MTD_WRITEABLE, + }, + [4] = { + .name = "reserved", + .offset = MTDPART_OFS_APPEND, + .size = SZ_256K + SZ_64K, + }, + [5] = { + .name = "kernel", + .offset = MTDPART_OFS_APPEND, + .size = SZ_2M + SZ_1M, + }, + [6] = { + .name = "fpga", + .offset = MTDPART_OFS_APPEND, + .size = SZ_2M, + }, + [7] = { + .name = "spare", + .offset = MTDPART_OFS_APPEND, + .size = MTDPART_SIZ_FULL, + }, +}; + +static struct flash_platform_data mityomapl138_spi_flash_data = { + .name = "m25p80", + .parts = spi_flash_partitions, + .nr_parts = ARRAY_SIZE(spi_flash_partitions), + .type = "m24p64", +}; + +static struct davinci_spi_config spi_eprom_config = { + .io_type = SPI_IO_TYPE_DMA, + .c2tdelay = 8, + .t2cdelay = 8, +}; + +static struct spi_board_info mityomapl138_spi_flash_info[] = { + { + .modalias = "m25p80", + .platform_data = &mityomapl138_spi_flash_data, + .controller_data = &spi_eprom_config, + .mode = SPI_MODE_0, + .max_speed_hz = 30000000, + .bus_num = 1, + .chip_select = 0, + }, +}; + +static struct davinci_spi_platform_data mityomapl138_spi1_pdata = { + .version = SPI_VERSION_2, + .num_chipselect = 1, + .intr_line = 1, +}; + +static void __init mityomapl138_init_spi1(struct spi_board_info *info, + unsigned len) +{ + int ret; + + ret = spi_register_board_info(info, len); + if (ret) + pr_warning("%s: failed to register board info : %d\n", + __func__, ret); + + ret = da8xx_register_spi(1, &mityomapl138_spi1_pdata); + if (ret) + pr_warning("%s: failed to register spi 1 device : %d\n", + __func__, ret); +} + +/* * MityDSP-L138 includes a 256 MByte large-page NAND flash * (128K blocks). */ @@ -448,6 +549,9 @@ static void __init mityomapl138_init(void) mityomapl138_setup_nand(); + mityomapl138_init_spi1(mityomapl138_spi_flash_info, + ARRAY_SIZE(mityomapl138_spi_flash_info)); + mityomapl138_config_emac(); ret = da8xx_register_rtc();