From patchwork Fri May 20 14:08:40 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manjunath Hadli X-Patchwork-Id: 803712 Received: from bear.ext.ti.com (bear.ext.ti.com [192.94.94.41]) by demeter2.kernel.org (8.14.4/8.14.3) with ESMTP id p4KE9ZFG027198 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=OK) for ; Fri, 20 May 2011 14:09:56 GMT Received: from dlep33.itg.ti.com ([157.170.170.112]) by bear.ext.ti.com (8.13.7/8.13.7) with ESMTP id p4KE8iZg017264 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=NO); Fri, 20 May 2011 09:08:44 -0500 Received: from linux.omap.com (localhost [127.0.0.1]) by dlep33.itg.ti.com (8.13.7/8.13.7) with ESMTP id p4KE8h2f013787; Fri, 20 May 2011 09:08:43 -0500 (CDT) Received: from linux.omap.com (localhost [127.0.0.1]) by linux.omap.com (Postfix) with ESMTP id 9640980627; Fri, 20 May 2011 09:08:43 -0500 (CDT) X-Original-To: davinci-linux-open-source@linux.davincidsp.com Delivered-To: davinci-linux-open-source@linux.davincidsp.com Received: from dbdp20.itg.ti.com (dbdp20.itg.ti.com [172.24.170.38]) by linux.omap.com (Postfix) with ESMTP id ACE2E80626 for ; Fri, 20 May 2011 09:08:41 -0500 (CDT) Received: from dbde70.ent.ti.com (localhost [127.0.0.1]) by dbdp20.itg.ti.com (8.13.8/8.13.8) with ESMTP id p4KE8eFB019601; Fri, 20 May 2011 19:38:40 +0530 (IST) Received: from dbdp31.itg.ti.com (172.24.170.98) by DBDE70.ent.ti.com (172.24.170.148) with Microsoft SMTP Server id 8.3.106.1; Fri, 20 May 2011 19:38:40 +0530 Received: from psplinux051.india.ti.com (psplinux051.india.ti.com [172.24.162.244]) by dbdp31.itg.ti.com (8.13.8/8.13.8) with ESMTP id p4KE8ed1009977; Fri, 20 May 2011 19:38:40 +0530 (IST) Received: from psplinux051.india.ti.com (localhost [127.0.0.1]) by psplinux051.india.ti.com (8.13.1/8.13.1) with ESMTP id p4KE8ehC003756; Fri, 20 May 2011 19:38:40 +0530 Received: (from x0144960@localhost) by psplinux051.india.ti.com (8.13.1/8.13.1/Submit) id p4KE8eH2003753; Fri, 20 May 2011 19:38:40 +0530 From: Manjunath Hadli To: dlos Subject: [PATCH 2/4] davinci: dm365: move macros local to dm365.c to that file Date: Fri, 20 May 2011 19:38:40 +0530 Message-ID: <1305900520-3725-1-git-send-email-manjunath.hadli@ti.com> X-Mailer: git-send-email 1.6.2.4 MIME-Version: 1.0 Cc: LAK X-BeenThere: davinci-linux-open-source@linux.davincidsp.com X-Mailman-Version: 2.1.12 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: davinci-linux-open-source-bounces@linux.davincidsp.com Errors-To: davinci-linux-open-source-bounces@linux.davincidsp.com X-Greylist: Sender succeeded STARTTLS authentication, not delayed by milter-greylist-4.2.6 (demeter2.kernel.org [140.211.167.43]); Fri, 20 May 2011 14:09:56 +0000 (UTC) move the register base addresses and offsets used only by dm365 platform file from platform header dm365.h to dm365.c as they are used only in the c file. Signed-off-by: Manjunath Hadli --- arch/arm/mach-davinci/dm365.c | 20 ++++++++++++++++++-- arch/arm/mach-davinci/include/mach/dm365.h | 12 ------------ 2 files changed, 18 insertions(+), 14 deletions(-) diff --git a/arch/arm/mach-davinci/dm365.c b/arch/arm/mach-davinci/dm365.c index 02d2cc3..7e2464e 100644 --- a/arch/arm/mach-davinci/dm365.c +++ b/arch/arm/mach-davinci/dm365.c @@ -39,8 +39,6 @@ #include "clock.h" #include "mux.h" -#define DM365_REF_FREQ 24000000 /* 24 MHz on the DM365 EVM */ - static struct pll_data pll1_data = { .num = 1, .phys_base = DAVINCI_PLL1_BASE, @@ -53,6 +51,8 @@ static struct pll_data pll2_data = { .flags = PLL_HAS_POSTDIV | PLL_HAS_PREDIV, }; +#define DM365_REF_FREQ 24000000 /* 24 MHz on the DM365 EVM */ + static struct clk ref_clk = { .name = "ref_clk", .rate = DM365_REF_FREQ, @@ -681,6 +681,10 @@ void __init dm365_init_spi0(unsigned chipselect_mask, platform_device_register(&dm365_spi0_device); } +#define DM365_EMAC_CNTRL_OFFSET 0x0000 +#define DM365_EMAC_CNTRL_MOD_OFFSET 0x3000 +#define DM365_EMAC_CNTRL_RAM_OFFSET 0x1000 +#define DM365_EMAC_CNTRL_RAM_SIZE 0x2000 static struct emac_platform_data dm365_emac_pdata = { .ctrl_reg_offset = DM365_EMAC_CNTRL_OFFSET, .ctrl_mod_reg_offset = DM365_EMAC_CNTRL_MOD_OFFSET, @@ -689,6 +693,8 @@ static struct emac_platform_data dm365_emac_pdata = { .version = EMAC_VERSION_2, }; +#define DM365_EMAC_BASE 0x01D07000 + static struct resource dm365_emac_resources[] = { { .start = DM365_EMAC_BASE, @@ -727,6 +733,8 @@ static struct platform_device dm365_emac_device = { .resource = dm365_emac_resources, }; +#define DM365_EMAC_MDIO_BASE (DM365_EMAC_BASE + 0x4000) + static struct resource dm365_mdio_resources[] = { { .start = DM365_EMAC_MDIO_BASE, @@ -922,6 +930,10 @@ static struct platform_device dm365_asp_device = { .resource = dm365_asp_resources, }; +#define DAVINCI_DM365_VC_BASE 0x01D0C000 +#define DAVINCI_DMA_VC_TX 2 +#define DAVINCI_DMA_VC_RX 3 + static struct resource dm365_vc_resources[] = { { .start = DAVINCI_DM365_VC_BASE, @@ -947,6 +959,8 @@ static struct platform_device dm365_vc_device = { .resource = dm365_vc_resources, }; +#define DM365_RTC_BASE 0x01C69000 + static struct resource dm365_rtc_resources[] = { { .start = DM365_RTC_BASE, @@ -981,6 +995,8 @@ static struct map_desc dm365_io_desc[] = { }, }; +#define DM365_KEYSCAN_BASE 0x01C69400 + static struct resource dm365_ks_resources[] = { { /* registers */ diff --git a/arch/arm/mach-davinci/include/mach/dm365.h b/arch/arm/mach-davinci/include/mach/dm365.h index 2563bf4..c3c69a6 100644 --- a/arch/arm/mach-davinci/include/mach/dm365.h +++ b/arch/arm/mach-davinci/include/mach/dm365.h @@ -20,18 +20,6 @@ #include #include -#define DM365_EMAC_BASE (0x01D07000) -#define DM365_EMAC_MDIO_BASE (DM365_EMAC_BASE + 0x4000) -#define DM365_EMAC_CNTRL_OFFSET (0x0000) -#define DM365_EMAC_CNTRL_MOD_OFFSET (0x3000) -#define DM365_EMAC_CNTRL_RAM_OFFSET (0x1000) -#define DM365_EMAC_CNTRL_RAM_SIZE (0x2000) - -/* Base of key scan register bank */ -#define DM365_KEYSCAN_BASE (0x01C69400) - -#define DM365_RTC_BASE (0x01C69000) - #define DAVINCI_DM365_VC_BASE (0x01D0C000) #define DAVINCI_DMA_VC_TX 2 #define DAVINCI_DMA_VC_RX 3