| Message ID | 1311163564-24526-1-git-send-email-sudhakar.raj@ti.com (mailing list archive) |
|---|---|
| State | Awaiting Upstream |
| Headers | show |
On 20/07/11 13:06, Rajashekhara, Sudhakar wrote: > According to DM365 voice codec data sheet at [1], before starting > recording or playback, ADC/DAC modules should follow a reset and > enable cycle. Writing a 1 to the ADC/DAC bit in the register resets > the module and clearing the bit to 0 will enable the module. But the > driver seems to be doing the reverse of it. > > [1] http://focus.ti.com/lit/ug/sprufi9b/sprufi9b.pdf > > Signed-off-by: Rajashekhara, Sudhakar <sudhakar.raj@ti.com> > --- Both Acked-by: Liam Girdwood <lrg@ti.com>
On Wed, Jul 20, 2011 at 05:36:04PM +0530, Rajashekhara, Sudhakar wrote: > According to DM365 voice codec data sheet at [1], before starting > recording or playback, ADC/DAC modules should follow a reset and > enable cycle. Writing a 1 to the ADC/DAC bit in the register resets > the module and clearing the bit to 0 will enable the module. But the > driver seems to be doing the reverse of it. Applied, thanks.
diff --git a/sound/soc/davinci/davinci-vcif.c b/sound/soc/davinci/davinci-vcif.c index 9259f1f..c957e9e 100644 --- a/sound/soc/davinci/davinci-vcif.c +++ b/sound/soc/davinci/davinci-vcif.c @@ -62,9 +62,9 @@ static void davinci_vcif_start(struct snd_pcm_substream *substream) w = readl(davinci_vc->base + DAVINCI_VC_CTRL); if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) - MOD_REG_BIT(w, DAVINCI_VC_CTRL_RSTDAC, 1); + MOD_REG_BIT(w, DAVINCI_VC_CTRL_RSTDAC, 0); else - MOD_REG_BIT(w, DAVINCI_VC_CTRL_RSTADC, 1); + MOD_REG_BIT(w, DAVINCI_VC_CTRL_RSTADC, 0); writel(w, davinci_vc->base + DAVINCI_VC_CTRL); } @@ -80,9 +80,9 @@ static void davinci_vcif_stop(struct snd_pcm_substream *substream) /* Reset transmitter/receiver and sample rate/frame sync generators */ w = readl(davinci_vc->base + DAVINCI_VC_CTRL); if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) - MOD_REG_BIT(w, DAVINCI_VC_CTRL_RSTDAC, 0); + MOD_REG_BIT(w, DAVINCI_VC_CTRL_RSTDAC, 1); else - MOD_REG_BIT(w, DAVINCI_VC_CTRL_RSTADC, 0); + MOD_REG_BIT(w, DAVINCI_VC_CTRL_RSTADC, 1); writel(w, davinci_vc->base + DAVINCI_VC_CTRL); }
According to DM365 voice codec data sheet at [1], before starting recording or playback, ADC/DAC modules should follow a reset and enable cycle. Writing a 1 to the ADC/DAC bit in the register resets the module and clearing the bit to 0 will enable the module. But the driver seems to be doing the reverse of it. [1] http://focus.ti.com/lit/ug/sprufi9b/sprufi9b.pdf Signed-off-by: Rajashekhara, Sudhakar <sudhakar.raj@ti.com> --- sound/soc/davinci/davinci-vcif.c | 8 ++++---- 1 files changed, 4 insertions(+), 4 deletions(-)