From patchwork Wed Aug 8 15:10:31 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Hebbar, Gururaja" X-Patchwork-Id: 1296521 Return-Path: X-Original-To: patchwork-davinci@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork1.kernel.org Received: from comal.ext.ti.com (comal.ext.ti.com [198.47.26.152]) by patchwork1.kernel.org (Postfix) with ESMTP id B019D3FC23 for ; Wed, 8 Aug 2012 15:28:07 +0000 (UTC) Received: from dlelxv30.itg.ti.com ([172.17.2.17]) by comal.ext.ti.com (8.13.7/8.13.7) with ESMTP id q78FQ4LS029987; Wed, 8 Aug 2012 10:26:04 -0500 Received: from DFLE72.ent.ti.com (dfle72.ent.ti.com [128.247.5.109]) by dlelxv30.itg.ti.com (8.13.8/8.13.8) with ESMTP id q78FQ3DC016117; Wed, 8 Aug 2012 10:26:03 -0500 Received: from dlelxv23.itg.ti.com (172.17.1.198) by dfle72.ent.ti.com (128.247.5.109) with Microsoft SMTP Server id 14.1.323.3; Wed, 8 Aug 2012 10:26:03 -0500 Received: from linux.omap.com (dlelxs01.itg.ti.com [157.170.227.31]) by dlelxv23.itg.ti.com (8.13.8/8.13.8) with ESMTP id q78FQ3mD016348; Wed, 8 Aug 2012 10:26:03 -0500 Received: from linux.omap.com (localhost [127.0.0.1]) by linux.omap.com (Postfix) with ESMTP id 9C8B880631; Wed, 8 Aug 2012 10:26:02 -0500 (CDT) X-Original-To: davinci-linux-open-source@linux.davincidsp.com Delivered-To: davinci-linux-open-source@linux.davincidsp.com Received: from dbdp20.itg.ti.com (dbdp20.itg.ti.com [172.24.170.38]) by linux.omap.com (Postfix) with ESMTP id 5CF5880628 for ; Wed, 8 Aug 2012 10:25:00 -0500 (CDT) Received: from DBDE71.ent.ti.com (localhost [127.0.0.1]) by dbdp20.itg.ti.com (8.13.8/8.13.8) with ESMTP id q78FOvAh004345; Wed, 8 Aug 2012 20:54:58 +0530 (IST) Received: from dbdp32.itg.ti.com (172.24.170.251) by DBDE71.ent.ti.com (172.24.170.149) with Microsoft SMTP Server id 14.1.323.3; Wed, 8 Aug 2012 20:54:57 +0530 Received: from ucmsshproxy.india.ext.ti.com (dbdp20.itg.ti.com [172.24.170.38]) by dbdp32.itg.ti.com (8.13.8/8.13.8) with SMTP id q78FOrXV018652; Wed, 8 Aug 2012 20:54:53 +0530 Received: from symphony.india.ext.ti.com (unknown [192.168.247.13]) by ucmsshproxy.india.ext.ti.com (Postfix) with ESMTP id 27AE9158003; Wed, 8 Aug 2012 20:54:53 +0530 (IST) Received: from linux-psp-server.india.ext.ti.com (linux-psp-server [192.168.247.76]) by symphony.india.ext.ti.com (8.11.7p1+Sun/8.11.7) with ESMTP id q78FOqI14996; Wed, 8 Aug 2012 20:54:52 +0530 (IST) From: "Hebbar, Gururaja" To: , , Subject: [PATCH] ASoC: Davinci: McASP: Flush the FIFO before enabling Date: Wed, 8 Aug 2012 20:40:31 +0530 Message-ID: <1344438632-2604-2-git-send-email-gururaja.hebbar@ti.com> X-Mailer: git-send-email 1.7.1 In-Reply-To: <1344438632-2604-1-git-send-email-gururaja.hebbar@ti.com> References: <1344438632-2604-1-git-send-email-gururaja.hebbar@ti.com> MIME-Version: 1.0 CC: , , X-BeenThere: davinci-linux-open-source@linux.davincidsp.com X-Mailman-Version: 2.1.12 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: Errors-To: davinci-linux-open-source-bounces@linux.davincidsp.com From: Vaibhav Bedia FIFO should be flushed before it is enabled for the first time. This fixes the I/O errors reported by the ASoC core on a fresh boot Signed-off-by: Vaibhav Bedia Signed-off-by: Hebbar, Gururaja --- This patch was tested on AM18x Board and is based on repo at http://git.kernel.org/?p=linux/kernel/git/broonie/sound.git; a=shortlog;h=refs/heads/for-3.6 :100644 100644 95441bf... ce5e5cd... M sound/soc/davinci/davinci-mcasp.c sound/soc/davinci/davinci-mcasp.c | 10 ++++++++-- 1 files changed, 8 insertions(+), 2 deletions(-) diff --git a/sound/soc/davinci/davinci-mcasp.c b/sound/soc/davinci/davinci-mcasp.c index 95441bf..ce5e5cd 100644 --- a/sound/soc/davinci/davinci-mcasp.c +++ b/sound/soc/davinci/davinci-mcasp.c @@ -380,14 +380,20 @@ static void mcasp_start_tx(struct davinci_audio_dev *dev) static void davinci_mcasp_start(struct davinci_audio_dev *dev, int stream) { if (stream == SNDRV_PCM_STREAM_PLAYBACK) { - if (dev->txnumevt) /* enable FIFO */ + if (dev->txnumevt) { /* enable FIFO */ + mcasp_clr_bits(dev->base + DAVINCI_MCASP_WFIFOCTL, + FIFO_ENABLE); mcasp_set_bits(dev->base + DAVINCI_MCASP_WFIFOCTL, FIFO_ENABLE); + } mcasp_start_tx(dev); } else { - if (dev->rxnumevt) /* enable FIFO */ + if (dev->rxnumevt) { /* enable FIFO */ + mcasp_clr_bits(dev->base + DAVINCI_MCASP_RFIFOCTL, + FIFO_ENABLE); mcasp_set_bits(dev->base + DAVINCI_MCASP_RFIFOCTL, FIFO_ENABLE); + } mcasp_start_rx(dev); } }