From patchwork Wed Nov 28 10:55:32 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Prabhakar X-Patchwork-Id: 1815591 Return-Path: X-Original-To: patchwork-davinci@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork2.kernel.org Received: from comal.ext.ti.com (comal.ext.ti.com [198.47.26.152]) by patchwork2.kernel.org (Postfix) with ESMTP id 001F0DF26F for ; Wed, 28 Nov 2012 10:56:07 +0000 (UTC) Received: from dlelxv30.itg.ti.com ([172.17.2.17]) by comal.ext.ti.com (8.13.7/8.13.7) with ESMTP id qASAu7a2019848 for ; Wed, 28 Nov 2012 04:56:07 -0600 Received: from DFLE72.ent.ti.com (dfle72.ent.ti.com [128.247.5.109]) by dlelxv30.itg.ti.com (8.13.8/8.13.8) with ESMTP id qASAu6QZ023560 for ; Wed, 28 Nov 2012 04:56:07 -0600 Received: from dlelxv23.itg.ti.com (172.17.1.198) by dfle72.ent.ti.com (128.247.5.109) with Microsoft SMTP Server id 14.1.323.3; Wed, 28 Nov 2012 04:56:06 -0600 Received: from linux.omap.com (dlelxs01.itg.ti.com [157.170.227.31]) by dlelxv23.itg.ti.com (8.13.8/8.13.8) with ESMTP id qASAu6F0025744 for ; Wed, 28 Nov 2012 04:56:06 -0600 Received: from linux.omap.com (localhost [127.0.0.1]) by linux.omap.com (Postfix) with ESMTP id B28D980659 for ; Wed, 28 Nov 2012 04:56:03 -0600 (CST) X-Original-To: davinci-linux-open-source@linux.davincidsp.com Delivered-To: davinci-linux-open-source@linux.davincidsp.com Received: from dflp52.itg.ti.com (dflp52.itg.ti.com [128.247.22.96]) by linux.omap.com (Postfix) with ESMTP id 0C06480626 for ; Wed, 28 Nov 2012 04:55:52 -0600 (CST) Received: from medina.ext.ti.com (medina.ext.ti.com [192.91.81.31]) by dflp52.itg.ti.com (8.13.7/8.13.8) with ESMTP id qASAtpqi008126 for ; Wed, 28 Nov 2012 04:55:51 -0600 (CST) Received: from psmtp.com (na3sys009amx195.postini.com [74.125.149.176]) by medina.ext.ti.com (8.13.7/8.13.7) with SMTP id qASAtp6M006021 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=NO) for ; Wed, 28 Nov 2012 04:55:51 -0600 Received: from mail-pa0-f45.google.com ([209.85.220.45]) (using TLSv1) by na3sys009amx195.postini.com ([74.125.148.10]) with SMTP; Wed, 28 Nov 2012 04:55:51 CST Received: by mail-pa0-f45.google.com with SMTP id bg2so6772032pad.4 for ; Wed, 28 Nov 2012 02:55:50 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:cc:subject:date:message-id:x-mailer:in-reply-to:references; bh=Z6CrLnrIuU30WxcewA3MgOyXCIFDW3DeJ8OmyJxl7gM=; b=nHd16tZeHRShF9fr73+LxdmFpeK1o+toIHZ3kqRJKCF5vdXq0o8yofsdUcgpRMcCSl SdJ23OaSAxBUuC/elk6+ZA81xzlE8Uu0+7fyWpKjLm+nl0kAKl79D3dZvhfs75IzAL/a JCF3nVo3F8pok9m9d0mbt7fAgueszCppMVvx8/7pOw2PqHNpodDlNKAnIk8Z5s2MW4gP yvfLoheACsOzHXg413vY6Art2ylEJTsNc1Dk20XGUirjic5I18AM1xWIwcinMtdwYCaN kREMvQ05YEFtTYvwffktUYTqcPszxZI7hRaANTUBk8iG14f5Kv05OUSVIG0pc70wxH2D 3Axg== Received: by 10.66.88.102 with SMTP id bf6mr51426409pab.10.1354100150514; Wed, 28 Nov 2012 02:55:50 -0800 (PST) Received: from localhost.localdomain ([122.166.13.141]) by mx.google.com with ESMTPS id nm9sm12280572pbc.46.2012.11.28.02.55.46 (version=TLSv1/SSLv3 cipher=OTHER); Wed, 28 Nov 2012 02:55:49 -0800 (PST) From: Prabhakar Lad To: LMML , Mauro Carvalho Chehab Subject: [PATCH v3 1/3] davinci: vpss: dm365: enable ISP registers Date: Wed, 28 Nov 2012 16:25:32 +0530 Message-ID: <1354100134-21095-2-git-send-email-prabhakar.lad@ti.com> X-Mailer: git-send-email 1.7.4.1 In-Reply-To: <1354100134-21095-1-git-send-email-prabhakar.lad@ti.com> References: <1354100134-21095-1-git-send-email-prabhakar.lad@ti.com> X-pstn-neptune: 0/0/0.00/0 X-pstn-levels: (S:28.61927/99.90000 CV:99.9000 FC:95.5390 LC:95.5390 R:95.9108 P:95.9108 M:97.0282 C:98.6951 ) X-pstn-dkim: 1 skipped:no-policies X-pstn-settings: 2 (0.5000:0.0050) s cv GT3 gt2 gt1 r p m c X-pstn-addresses: from [82/3] CC: DLOS , LKML , Sakari Ailus , Hans Verkuil X-BeenThere: davinci-linux-open-source@linux.davincidsp.com X-Mailman-Version: 2.1.12 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: Errors-To: davinci-linux-open-source-bounces+patchwork-davinci=patchwork.kernel.org@linux.davincidsp.com From: Manjunath Hadli enable PPCR, enbale ISIF out on BCR and disable all events to get the correct operation from ISIF. Signed-off-by: Manjunath Hadli Signed-off-by: Lad, Prabhakar --- drivers/media/platform/davinci/vpss.c | 13 +++++++++++++ 1 files changed, 13 insertions(+), 0 deletions(-) diff --git a/drivers/media/platform/davinci/vpss.c b/drivers/media/platform/davinci/vpss.c index 146e4b0..34ad7bd 100644 --- a/drivers/media/platform/davinci/vpss.c +++ b/drivers/media/platform/davinci/vpss.c @@ -52,9 +52,11 @@ MODULE_AUTHOR("Texas Instruments"); #define DM355_VPSSBL_EVTSEL_DEFAULT 0x4 #define DM365_ISP5_PCCR 0x04 +#define DM365_ISP5_BCR 0x08 #define DM365_ISP5_INTSEL1 0x10 #define DM365_ISP5_INTSEL2 0x14 #define DM365_ISP5_INTSEL3 0x18 +#define DM365_ISP5_EVTSEL 0x1c #define DM365_ISP5_CCDCMUX 0x20 #define DM365_ISP5_PG_FRAME_SIZE 0x28 #define DM365_VPBE_CLK_CTRL 0x00 @@ -357,6 +359,10 @@ void dm365_vpss_set_pg_frame_size(struct vpss_pg_frame_size frame_size) } EXPORT_SYMBOL(dm365_vpss_set_pg_frame_size); +#define DM365_ISP5_EVTSEL_EVT_DISABLE 0x00000000 +#define DM365_ISP5_BCR_ISIF_OUT_ENABLE 0x00000002 +#define DM365_ISP5_PCCR_CLK_ENABLE 0x0000007f + static int __devinit vpss_probe(struct platform_device *pdev) { struct resource *r1, *r2; @@ -426,9 +432,16 @@ static int __devinit vpss_probe(struct platform_device *pdev) oper_cfg.hw_ops.enable_clock = dm365_enable_clock; oper_cfg.hw_ops.select_ccdc_source = dm365_select_ccdc_source; /* Setup vpss interrupts */ + isp5_write((isp5_read(DM365_ISP5_PCCR) | + DM365_ISP5_PCCR_CLK_ENABLE), DM365_ISP5_PCCR); + isp5_write((isp5_read(DM365_ISP5_BCR) | + DM365_ISP5_BCR_ISIF_OUT_ENABLE), DM365_ISP5_BCR); isp5_write(DM365_ISP5_INTSEL1_DEFAULT, DM365_ISP5_INTSEL1); isp5_write(DM365_ISP5_INTSEL2_DEFAULT, DM365_ISP5_INTSEL2); isp5_write(DM365_ISP5_INTSEL3_DEFAULT, DM365_ISP5_INTSEL3); + /* No event selected */ + isp5_write((isp5_read(DM365_ISP5_EVTSEL) | + DM365_ISP5_EVTSEL_EVT_DISABLE), DM365_ISP5_EVTSEL); } else oper_cfg.hw_ops.clear_wbl_overflow = dm644x_clear_wbl_overflow;