| Message ID | 1357863807-380-6-git-send-email-rtivy@ti.com (mailing list archive) |
|---|---|
| State | Changes Requested |
| Headers | show |
On 1/11/2013 5:53 AM, Robert Tivy wrote: > Since there is no general "reset" support for SoC devices, and since the > remoteproc driver needs explicit control of the DSP's reset line, a new > Davinci-specific API is added. > > This private API will disappear with DT migration. Some discussion > regarding a proposed DT "reset" binding is here: > https://patchwork.kernel.org/patch/1635051/ > > Modified davinci_clk_init() to set clk "reset" function for clocks > that indicate PSC_LRST support. Also fixed indentation issue with > function opening curly brace. > > Signed-off-by: Robert Tivy <rtivy@ti.com> I applied this patch for v3.9. The subject seemed too long with repeated references to davinci so I shortened it to: ARM: davinci: psc: introduce reset API > --- a/arch/arm/mach-davinci/include/mach/psc.h > +++ b/arch/arm/mach-davinci/include/mach/psc.h > @@ -246,6 +246,7 @@ > > #define MDSTAT_STATE_MASK 0x3f > #define PDSTAT_STATE_MASK 0x1f > +#define MDCTL_LRST BIT(8) > #define MDCTL_FORCE BIT(31) > #define PDCTL_NEXT BIT(0) > #define PDCTL_EPCGOOD BIT(8) > @@ -253,6 +254,8 @@ > #ifndef __ASSEMBLER__ > > extern int davinci_psc_is_clk_active(unsigned int ctlr, unsigned int id); > +extern void davinci_psc_reset_config(unsigned int ctlr, unsigned int id, > + bool reset); I felt the word 'config' in the name is not really required since the functionality is fixed (as opposed to the davinci_psc_config() function which could do multiple configurations) I updated the function name to davinci_psc_reset() when I committed the patch locally. Hope that's okay with you. Thanks, Sekhar
Thankyou for all your help Sekhar. I'm fine with your fixups (both commentary and code naming). Regards, - Rob > -----Original Message----- > From: Nori, Sekhar > Sent: Thursday, January 17, 2013 3:33 AM > To: Tivy, Robert > Cc: davinci-linux-open-source@linux.davincidsp.com; linux-arm- > kernel@lists.infradead.org; Ring, Chris; Grosen, Mark; ohad@wizery.com; > rob@landley.net; linux-doc@vger.kernel.org > Subject: Re: [PATCH v5 5/9] ARM: davinci: New reset functionality/API > provided for Davinci DSP > > On 1/11/2013 5:53 AM, Robert Tivy wrote: > > Since there is no general "reset" support for SoC devices, and since > the > > remoteproc driver needs explicit control of the DSP's reset line, a > new > > Davinci-specific API is added. > > > > This private API will disappear with DT migration. Some discussion > > regarding a proposed DT "reset" binding is here: > > https://patchwork.kernel.org/patch/1635051/ > > > > Modified davinci_clk_init() to set clk "reset" function for clocks > > that indicate PSC_LRST support. Also fixed indentation issue with > > function opening curly brace. > > > > Signed-off-by: Robert Tivy <rtivy@ti.com> > > I applied this patch for v3.9. The subject seemed too long with > repeated > references to davinci so I shortened it to: > > ARM: davinci: psc: introduce reset API > > > --- a/arch/arm/mach-davinci/include/mach/psc.h > > +++ b/arch/arm/mach-davinci/include/mach/psc.h > > @@ -246,6 +246,7 @@ > > > > #define MDSTAT_STATE_MASK 0x3f > > #define PDSTAT_STATE_MASK 0x1f > > +#define MDCTL_LRST BIT(8) > > #define MDCTL_FORCE BIT(31) > > #define PDCTL_NEXT BIT(0) > > #define PDCTL_EPCGOOD BIT(8) > > @@ -253,6 +254,8 @@ > > #ifndef __ASSEMBLER__ > > > > extern int davinci_psc_is_clk_active(unsigned int ctlr, unsigned int > id); > > +extern void davinci_psc_reset_config(unsigned int ctlr, unsigned int > id, > > + bool reset); > > I felt the word 'config' in the name is not really required since the > functionality is fixed (as opposed to the davinci_psc_config() function > which could do multiple configurations) > > I updated the function name to davinci_psc_reset() when I committed the > patch locally. > > Hope that's okay with you. > > Thanks, > Sekhar
diff --git a/arch/arm/mach-davinci/clock.c b/arch/arm/mach-davinci/clock.c index 34668ea..e1dd522 100644 --- a/arch/arm/mach-davinci/clock.c +++ b/arch/arm/mach-davinci/clock.c @@ -52,6 +52,40 @@ static void __clk_disable(struct clk *clk) __clk_disable(clk->parent); } +int davinci_clk_reset(struct clk *clk, bool reset) +{ + unsigned long flags; + + if (clk == NULL || IS_ERR(clk)) + return -EINVAL; + + spin_lock_irqsave(&clockfw_lock, flags); + if (clk->flags & CLK_PSC) + davinci_psc_reset_config(clk->gpsc, clk->lpsc, reset); + spin_unlock_irqrestore(&clockfw_lock, flags); + + return 0; +} +EXPORT_SYMBOL(davinci_clk_reset); + +int davinci_clk_reset_assert(struct clk *clk) +{ + if (clk == NULL || IS_ERR(clk) || !clk->reset) + return -EINVAL; + + return clk->reset(clk, true); +} +EXPORT_SYMBOL(davinci_clk_reset_assert); + +int davinci_clk_reset_deassert(struct clk *clk) +{ + if (clk == NULL || IS_ERR(clk) || !clk->reset) + return -EINVAL; + + return clk->reset(clk, false); +} +EXPORT_SYMBOL(davinci_clk_reset_deassert); + int clk_enable(struct clk *clk) { unsigned long flags; @@ -535,7 +569,7 @@ int davinci_set_refclk_rate(unsigned long rate) } int __init davinci_clk_init(struct clk_lookup *clocks) - { +{ struct clk_lookup *c; struct clk *clk; size_t num_clocks = 0; @@ -576,6 +610,9 @@ int __init davinci_clk_init(struct clk_lookup *clocks) if (clk->lpsc) clk->flags |= CLK_PSC; + if (clk->flags & PSC_LRST) + clk->reset = davinci_clk_reset; + clk_register(clk); num_clocks++; diff --git a/arch/arm/mach-davinci/clock.h b/arch/arm/mach-davinci/clock.h index 46f0f1b..8694b39 100644 --- a/arch/arm/mach-davinci/clock.h +++ b/arch/arm/mach-davinci/clock.h @@ -103,6 +103,7 @@ struct clk { unsigned long (*recalc) (struct clk *); int (*set_rate) (struct clk *clk, unsigned long rate); int (*round_rate) (struct clk *clk, unsigned long rate); + int (*reset) (struct clk *clk, bool reset); }; /* Clock flags: SoC-specific flags start at BIT(16) */ @@ -112,6 +113,7 @@ struct clk { #define PRE_PLL BIT(4) /* source is before PLL mult/div */ #define PSC_SWRSTDISABLE BIT(5) /* Disable state is SwRstDisable */ #define PSC_FORCE BIT(6) /* Force module state transtition */ +#define PSC_LRST BIT(8) /* Use local reset on enable/disable */ #define CLK(dev, con, ck) \ { \ @@ -126,6 +128,7 @@ int davinci_set_pllrate(struct pll_data *pll, unsigned int prediv, int davinci_set_sysclk_rate(struct clk *clk, unsigned long rate); int davinci_set_refclk_rate(unsigned long rate); int davinci_simple_set_rate(struct clk *clk, unsigned long rate); +int davinci_clk_reset(struct clk *clk, bool reset); extern struct platform_device davinci_wdt_device; extern void davinci_watchdog_reset(struct platform_device *); diff --git a/arch/arm/mach-davinci/include/mach/clock.h b/arch/arm/mach-davinci/include/mach/clock.h index a3b0402..3e8af6a 100644 --- a/arch/arm/mach-davinci/include/mach/clock.h +++ b/arch/arm/mach-davinci/include/mach/clock.h @@ -18,4 +18,7 @@ struct clk; extern int clk_register(struct clk *clk); extern void clk_unregister(struct clk *clk); +int davinci_clk_reset_assert(struct clk *c); +int davinci_clk_reset_deassert(struct clk *c); + #endif diff --git a/arch/arm/mach-davinci/include/mach/psc.h b/arch/arm/mach-davinci/include/mach/psc.h index 40a0027..0580133 100644 --- a/arch/arm/mach-davinci/include/mach/psc.h +++ b/arch/arm/mach-davinci/include/mach/psc.h @@ -246,6 +246,7 @@ #define MDSTAT_STATE_MASK 0x3f #define PDSTAT_STATE_MASK 0x1f +#define MDCTL_LRST BIT(8) #define MDCTL_FORCE BIT(31) #define PDCTL_NEXT BIT(0) #define PDCTL_EPCGOOD BIT(8) @@ -253,6 +254,8 @@ #ifndef __ASSEMBLER__ extern int davinci_psc_is_clk_active(unsigned int ctlr, unsigned int id); +extern void davinci_psc_reset_config(unsigned int ctlr, unsigned int id, + bool reset); extern void davinci_psc_config(unsigned int domain, unsigned int ctlr, unsigned int id, bool enable, u32 flags); diff --git a/arch/arm/mach-davinci/psc.c b/arch/arm/mach-davinci/psc.c index bddaba9..b6f0c10 100644 --- a/arch/arm/mach-davinci/psc.c +++ b/arch/arm/mach-davinci/psc.c @@ -48,6 +48,31 @@ int __init davinci_psc_is_clk_active(unsigned int ctlr, unsigned int id) return mdstat & BIT(12); } +/* Control "reset" line associated with PSC domain */ +void davinci_psc_reset_config(unsigned int ctlr, unsigned int id, bool reset) +{ + u32 mdctl; + void __iomem *psc_base; + struct davinci_soc_info *soc_info = &davinci_soc_info; + + if (!soc_info->psc_bases || (ctlr >= soc_info->psc_bases_num)) { + pr_warn("PSC: Bad psc data: 0x%x[%d]\n", + (int)soc_info->psc_bases, ctlr); + return; + } + + psc_base = ioremap(soc_info->psc_bases[ctlr], SZ_4K); + + mdctl = readl(psc_base + MDCTL + 4 * id); + if (reset) + mdctl &= ~MDCTL_LRST; + else + mdctl |= MDCTL_LRST; + writel(mdctl, psc_base + MDCTL + 4 * id); + + iounmap(psc_base); +} + /* Enable or disable a PSC domain */ void davinci_psc_config(unsigned int domain, unsigned int ctlr, unsigned int id, bool enable, u32 flags)
Since there is no general "reset" support for SoC devices, and since the remoteproc driver needs explicit control of the DSP's reset line, a new Davinci-specific API is added. This private API will disappear with DT migration. Some discussion regarding a proposed DT "reset" binding is here: https://patchwork.kernel.org/patch/1635051/ Modified davinci_clk_init() to set clk "reset" function for clocks that indicate PSC_LRST support. Also fixed indentation issue with function opening curly brace. Signed-off-by: Robert Tivy <rtivy@ti.com> --- arch/arm/mach-davinci/clock.c | 39 +++++++++++++++++++++++++++- arch/arm/mach-davinci/clock.h | 3 +++ arch/arm/mach-davinci/include/mach/clock.h | 3 +++ arch/arm/mach-davinci/include/mach/psc.h | 3 +++ arch/arm/mach-davinci/psc.c | 25 ++++++++++++++++++ 5 files changed, 72 insertions(+), 1 deletion(-)