From patchwork Wed Mar 6 19:56:07 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Matt Porter X-Patchwork-Id: 2228071 Return-Path: X-Original-To: patchwork-davinci@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork2.kernel.org Received: from comal.ext.ti.com (comal.ext.ti.com [198.47.26.152]) by patchwork2.kernel.org (Postfix) with ESMTP id 4BBB1DF23A for ; Wed, 6 Mar 2013 20:00:03 +0000 (UTC) Received: from dlelxv30.itg.ti.com ([172.17.2.17]) by comal.ext.ti.com (8.13.7/8.13.7) with ESMTP id r26JtneD006684; Wed, 6 Mar 2013 13:55:49 -0600 Received: from DLEE70.ent.ti.com (dlee70.ent.ti.com [157.170.170.113]) by dlelxv30.itg.ti.com (8.13.8/8.13.8) with ESMTP id r26JtnnY010661; Wed, 6 Mar 2013 13:55:49 -0600 Received: from dlelxv23.itg.ti.com (172.17.1.198) by DLEE70.ent.ti.com (157.170.170.113) with Microsoft SMTP Server id 14.2.342.3; Wed, 6 Mar 2013 13:55:48 -0600 Received: from linux.omap.com (dlelxs01.itg.ti.com [157.170.227.31]) by dlelxv23.itg.ti.com (8.13.8/8.13.8) with ESMTP id r26JtmGh027395; Wed, 6 Mar 2013 13:55:48 -0600 Received: from linux.omap.com (localhost [127.0.0.1]) by linux.omap.com (Postfix) with ESMTP id 1264280627; Wed, 6 Mar 2013 13:55:48 -0600 (CST) X-Original-To: davinci-linux-open-source@linux.davincidsp.com Delivered-To: davinci-linux-open-source@linux.davincidsp.com Received: from dflp53.itg.ti.com (dflp53.itg.ti.com [128.247.5.6]) by linux.omap.com (Postfix) with ESMTP id 38BFC8062A for ; Wed, 6 Mar 2013 13:55:47 -0600 (CST) Received: from neches.ext.ti.com (neches.ext.ti.com [192.91.81.29]) by dflp53.itg.ti.com (8.13.8/8.13.8) with ESMTP id r26Jtl56002816 for ; Wed, 6 Mar 2013 13:55:47 -0600 (CST) Received: from mail6.bemta8.messagelabs.com (mail6.bemta8.messagelabs.com [216.82.243.55]) by neches.ext.ti.com (8.13.7/8.13.7) with ESMTP id r26JtiAT012798 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=OK) for ; Wed, 6 Mar 2013 13:55:46 -0600 Received: from [216.82.242.147:29721] by server-4.bemta-8.messagelabs.com id D8/B5-08904-04F97315; Wed, 06 Mar 2013 19:55:44 +0000 X-Env-Sender: ohiomdp@gmail.com X-Msg-Ref: server-6.tower-95.messagelabs.com!1362599743!21328654!1 X-Originating-IP: [209.85.223.180] X-SpamReason: No, hits=0.0 required=7.0 tests= X-StarScan-Received: X-StarScan-Version: 6.8.6; banners=-,-,- X-VirusChecked: Checked Received: (qmail 31672 invoked from network); 6 Mar 2013 19:55:43 -0000 Received: from mail-ie0-f180.google.com (HELO mail-ie0-f180.google.com) (209.85.223.180) by server-6.tower-95.messagelabs.com with RC4-SHA encrypted SMTP; 6 Mar 2013 19:55:43 -0000 Received: by mail-ie0-f180.google.com with SMTP id bn7so10150688ieb.11 for ; Wed, 06 Mar 2013 11:55:43 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=x-received:sender:from:to:cc:subject:date:message-id:x-mailer :in-reply-to:references; bh=lWEdZYub4I2hFE3Uzh5hvhhKvWs2dja8TqFDE232+YU=; b=MNLEGZzZf4ILVer/RjdKfU1lvPTf77lVB33SW2nbCVZHw95mq6u5nftoKGcSW23Yjf HLdurhNqBP0sCM3cS6Tvu4NMrcQ2BwPOnw4PL+Lk2Yh/P3bvBoT+7mz1znTrw/Jp47D5 ySVDDzgV0D3roDK4TsnFwnqo4KhQOorm4b347rQNC+gQccJwa9aQL4nm9NfJ2r+xAZJF CdvQ8TUFlSscxRNugtVvP5GX6+aoPWSqDdKTTBni/vhq43LWmbw8gcUm5r9Z4pebXpTQ d8jX6rHVlcRSJUtet+bDQbLnAsSlzc+J48lpJKaU3EpM7XarY6qVrf7sAyZDDbbJT4or zFNA== X-Received: by 10.50.46.197 with SMTP id x5mr11876763igm.7.1362599742939; Wed, 06 Mar 2013 11:55:42 -0800 (PST) Received: from beef.ohporter.com (cpe-98-27-254-98.neo.res.rr.com. [98.27.254.98]) by mx.google.com with ESMTPS id wx2sm25991191igb.4.2013.03.06.11.55.41 (version=TLSv1.1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Wed, 06 Mar 2013 11:55:42 -0800 (PST) From: Matt Porter To: Vinod Koul , Chris Ball Subject: [PATCH v4 3/3] mmc: davinci: get SG segment limits with dma_get_slave_sg_limits() Date: Wed, 6 Mar 2013 14:56:07 -0500 Message-ID: <1362599767-11292-4-git-send-email-mporter@ti.com> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1362599767-11292-1-git-send-email-mporter@ti.com> References: <1362599767-11292-1-git-send-email-mporter@ti.com> CC: Linux DaVinci Kernel List , Linux MMC List , Linux Kernel Mailing List , Grant Likely , Dan Williams X-BeenThere: davinci-linux-open-source@linux.davincidsp.com X-Mailman-Version: 2.1.12 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: Errors-To: davinci-linux-open-source-bounces@linux.davincidsp.com Replace the hardcoded values used to set max_segs/max_seg_size with a dma_get_slave_sg_limits() query to the dmaengine driver. Signed-off-by: Matt Porter --- drivers/mmc/host/davinci_mmc.c | 37 ++++++++--------------------- include/linux/platform_data/mmc-davinci.h | 3 --- 2 files changed, 10 insertions(+), 30 deletions(-) diff --git a/drivers/mmc/host/davinci_mmc.c b/drivers/mmc/host/davinci_mmc.c index 2063677..a98b5bc 100644 --- a/drivers/mmc/host/davinci_mmc.c +++ b/drivers/mmc/host/davinci_mmc.c @@ -144,18 +144,6 @@ /* MMCSD Init clock in Hz in opendrain mode */ #define MMCSD_INIT_CLOCK 200000 -/* - * One scatterlist dma "segment" is at most MAX_CCNT rw_threshold units, - * and we handle up to MAX_NR_SG segments. MMC_BLOCK_BOUNCE kicks in only - * for drivers with max_segs == 1, making the segments bigger (64KB) - * than the page or two that's otherwise typical. nr_sg (passed from - * platform data) == 16 gives at least the same throughput boost, using - * EDMA transfer linkage instead of spending CPU time copying pages. - */ -#define MAX_CCNT ((1 << 16) - 1) - -#define MAX_NR_SG 16 - static unsigned rw_threshold = 32; module_param(rw_threshold, uint, S_IRUGO); MODULE_PARM_DESC(rw_threshold, @@ -216,8 +204,6 @@ struct mmc_davinci_host { u8 version; /* for ns in one cycle calculation */ unsigned ns_in_one_cycle; - /* Number of sg segments */ - u8 nr_sg; #ifdef CONFIG_CPU_FREQ struct notifier_block freq_transition; #endif @@ -1165,6 +1151,7 @@ static int __init davinci_mmcsd_probe(struct platform_device *pdev) struct resource *r, *mem = NULL; int ret = 0, irq = 0; size_t mem_size; + struct dma_slave_sg_limits *dma_sg_limits; /* REVISIT: when we're fully converted, fail if pdata is NULL */ @@ -1214,12 +1201,6 @@ static int __init davinci_mmcsd_probe(struct platform_device *pdev) init_mmcsd_host(host); - if (pdata->nr_sg) - host->nr_sg = pdata->nr_sg - 1; - - if (host->nr_sg > MAX_NR_SG || !host->nr_sg) - host->nr_sg = MAX_NR_SG; - host->use_dma = use_dma; host->mmc_irq = irq; host->sdio_irq = platform_get_irq(pdev, 1); @@ -1248,14 +1229,16 @@ static int __init davinci_mmcsd_probe(struct platform_device *pdev) mmc->caps |= pdata->caps; mmc->ocr_avail = MMC_VDD_32_33 | MMC_VDD_33_34; - /* With no iommu coalescing pages, each phys_seg is a hw_seg. - * Each hw_seg uses one EDMA parameter RAM slot, always one - * channel and then usually some linked slots. - */ - mmc->max_segs = MAX_NR_SG; + /* Just check one channel for the DMA SG limits */ + dma_sg_limits = dma_get_slave_sg_limits( + host->dma_tx, + DMA_SLAVE_BUSWIDTH_4_BYTES, + rw_threshold / DMA_SLAVE_BUSWIDTH_4_BYTES); - /* EDMA limit per hw segment (one or two MBytes) */ - mmc->max_seg_size = MAX_CCNT * rw_threshold; + if (dma_sg_limits) { + mmc->max_segs = dma_sg_limits->max_seg_nr; + mmc->max_seg_size = dma_sg_limits->max_seg_len; + } /* MMC/SD controller limits for multiblock requests */ mmc->max_blk_size = 4095; /* BLEN is 12 bits */ diff --git a/include/linux/platform_data/mmc-davinci.h b/include/linux/platform_data/mmc-davinci.h index 5ba6b22..6910209 100644 --- a/include/linux/platform_data/mmc-davinci.h +++ b/include/linux/platform_data/mmc-davinci.h @@ -25,9 +25,6 @@ struct davinci_mmc_config { /* Version of the MMC/SD controller */ u8 version; - - /* Number of sg segments */ - u8 nr_sg; }; void davinci_setup_mmc(int module, struct davinci_mmc_config *config);