| Message ID | 1363761714-15034-3-git-send-email-avinashphilip@ti.com (mailing list archive) |
|---|---|
| State | Changes Requested |
| Headers | show |
On 3/20/2013 12:11 PM, Philip Avinash wrote: > Add clock node support for ECAP and EHRPWM modules. > Also adds TBCLK for EHRWPM TBCLK to comply with pwm-tiehrpwm > driver. > > Signed-off-by: Philip Avinash <avinashphilip@ti.com> > --- > Changes Since v1: > - TBCLK make it as actual clock with enable/disable feature. > > :100644 100644 0c4a26d... dbed75c... M arch/arm/mach-davinci/da850.c > :100644 100644 de439b7... be77ce2... M arch/arm/mach-davinci/include/mach/da8xx.h > arch/arm/mach-davinci/da850.c | 46 ++++++++++++++++++++++++++++ > arch/arm/mach-davinci/include/mach/da8xx.h | 1 + > 2 files changed, 47 insertions(+) > > diff --git a/arch/arm/mach-davinci/da850.c b/arch/arm/mach-davinci/da850.c > index 0c4a26d..dbed75c 100644 > --- a/arch/arm/mach-davinci/da850.c > +++ b/arch/arm/mach-davinci/da850.c > @@ -383,6 +383,49 @@ static struct clk dsp_clk = { > .flags = PSC_LRST | PSC_FORCE, > }; > > +static struct clk ehrpwm_clk = { > + .name = "ehrpwm", > + .parent = &pll0_sysclk2, > + .lpsc = DA8XX_LPSC1_PWM, > + .gpsc = 1, > + .flags = DA850_CLK_ASYNC3, > +}; > + > +#define DA8XX_EHRPWM_TBCLKSYNC BIT(12) > + > +void tblck_enable(struct clk *clk) This should be static. Also, since tbclk is associated with ehrpwm, please call the function ehrpwm_tbclk_enable(). > +{ > + u32 val; > + > + val = readl(DA8XX_SYSCFG0_VIRT(DA8XX_CFGCHIP1_REG)); > + val |= DA8XX_EHRPWM_TBCLKSYNC; > + writel(val, DA8XX_SYSCFG0_VIRT(DA8XX_CFGCHIP1_REG)); > +} > + > +void tblck_disable(struct clk *clk) Same comment as above applies. Thanks, Sekhar
On Wed, Mar 20, 2013 at 16:54:34, Nori, Sekhar wrote: > On 3/20/2013 12:11 PM, Philip Avinash wrote: > > Add clock node support for ECAP and EHRPWM modules. > > Also adds TBCLK for EHRWPM TBCLK to comply with pwm-tiehrpwm > > driver. > > > > Signed-off-by: Philip Avinash <avinashphilip@ti.com> > > --- > > Changes Since v1: > > - TBCLK make it as actual clock with enable/disable feature. > > > > :100644 100644 0c4a26d... dbed75c... M arch/arm/mach-davinci/da850.c > > :100644 100644 de439b7... be77ce2... M arch/arm/mach-davinci/include/mach/da8xx.h > > arch/arm/mach-davinci/da850.c | 46 ++++++++++++++++++++++++++++ > > arch/arm/mach-davinci/include/mach/da8xx.h | 1 + > > 2 files changed, 47 insertions(+) > > > > diff --git a/arch/arm/mach-davinci/da850.c b/arch/arm/mach-davinci/da850.c > > index 0c4a26d..dbed75c 100644 > > --- a/arch/arm/mach-davinci/da850.c > > +++ b/arch/arm/mach-davinci/da850.c > > @@ -383,6 +383,49 @@ static struct clk dsp_clk = { > > .flags = PSC_LRST | PSC_FORCE, > > }; > > > > +static struct clk ehrpwm_clk = { > > + .name = "ehrpwm", > > + .parent = &pll0_sysclk2, > > + .lpsc = DA8XX_LPSC1_PWM, > > + .gpsc = 1, > > + .flags = DA850_CLK_ASYNC3, > > +}; > > + > > +#define DA8XX_EHRPWM_TBCLKSYNC BIT(12) > > + > > +void tblck_enable(struct clk *clk) > > This should be static. Also, since tbclk is associated with ehrpwm, > please call the function ehrpwm_tbclk_enable(). Ok I will correct it. Thanks Avinash > > > +{ > > + u32 val; > > + > > + val = readl(DA8XX_SYSCFG0_VIRT(DA8XX_CFGCHIP1_REG)); > > + val |= DA8XX_EHRPWM_TBCLKSYNC; > > + writel(val, DA8XX_SYSCFG0_VIRT(DA8XX_CFGCHIP1_REG)); > > +} > > + > > +void tblck_disable(struct clk *clk) > > Same comment as above applies. > > Thanks, > Sekhar >
diff --git a/arch/arm/mach-davinci/da850.c b/arch/arm/mach-davinci/da850.c index 0c4a26d..dbed75c 100644 --- a/arch/arm/mach-davinci/da850.c +++ b/arch/arm/mach-davinci/da850.c @@ -383,6 +383,49 @@ static struct clk dsp_clk = { .flags = PSC_LRST | PSC_FORCE, }; +static struct clk ehrpwm_clk = { + .name = "ehrpwm", + .parent = &pll0_sysclk2, + .lpsc = DA8XX_LPSC1_PWM, + .gpsc = 1, + .flags = DA850_CLK_ASYNC3, +}; + +#define DA8XX_EHRPWM_TBCLKSYNC BIT(12) + +void tblck_enable(struct clk *clk) +{ + u32 val; + + val = readl(DA8XX_SYSCFG0_VIRT(DA8XX_CFGCHIP1_REG)); + val |= DA8XX_EHRPWM_TBCLKSYNC; + writel(val, DA8XX_SYSCFG0_VIRT(DA8XX_CFGCHIP1_REG)); +} + +void tblck_disable(struct clk *clk) +{ + u32 val; + + val = readl(DA8XX_SYSCFG0_VIRT(DA8XX_CFGCHIP1_REG)); + val &= ~DA8XX_EHRPWM_TBCLKSYNC; + writel(val, DA8XX_SYSCFG0_VIRT(DA8XX_CFGCHIP1_REG)); +} + +static struct clk ehrpwm_tbclk = { + .name = "ehrpwm_tbclk", + .parent = &ehrpwm_clk, + .clk_enable = tblck_enable, + .clk_disable = tblck_disable, +}; + +static struct clk ecap_clk = { + .name = "ecap", + .parent = &pll0_sysclk2, + .lpsc = DA8XX_LPSC1_ECAP, + .gpsc = 1, + .flags = DA850_CLK_ASYNC3, +}; + static struct clk_lookup da850_clks[] = { CLK(NULL, "ref", &ref_clk), CLK(NULL, "pll0", &pll0_clk), @@ -430,6 +473,9 @@ static struct clk_lookup da850_clks[] = { CLK("vpif", NULL, &vpif_clk), CLK("ahci", NULL, &sata_clk), CLK("davinci-rproc.0", NULL, &dsp_clk), + CLK("ehrpwm", "fck", &ehrpwm_clk), + CLK("ehrpwm", "tbclk", &ehrpwm_tbclk), + CLK("ecap", "fck", &ecap_clk), CLK(NULL, NULL, NULL), }; diff --git a/arch/arm/mach-davinci/include/mach/da8xx.h b/arch/arm/mach-davinci/include/mach/da8xx.h index de439b7..be77ce2 100644 --- a/arch/arm/mach-davinci/include/mach/da8xx.h +++ b/arch/arm/mach-davinci/include/mach/da8xx.h @@ -55,6 +55,7 @@ extern unsigned int da850_max_speed; #define DA8XX_SYSCFG0_VIRT(x) (da8xx_syscfg0_base + (x)) #define DA8XX_JTAG_ID_REG 0x18 #define DA8XX_CFGCHIP0_REG 0x17c +#define DA8XX_CFGCHIP1_REG 0x180 #define DA8XX_CFGCHIP2_REG 0x184 #define DA8XX_CFGCHIP3_REG 0x188
Add clock node support for ECAP and EHRPWM modules. Also adds TBCLK for EHRWPM TBCLK to comply with pwm-tiehrpwm driver. Signed-off-by: Philip Avinash <avinashphilip@ti.com> --- Changes Since v1: - TBCLK make it as actual clock with enable/disable feature. :100644 100644 0c4a26d... dbed75c... M arch/arm/mach-davinci/da850.c :100644 100644 de439b7... be77ce2... M arch/arm/mach-davinci/include/mach/da8xx.h arch/arm/mach-davinci/da850.c | 46 ++++++++++++++++++++++++++++ arch/arm/mach-davinci/include/mach/da8xx.h | 1 + 2 files changed, 47 insertions(+)