From patchwork Wed Mar 20 06:41:53 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: avinash philip X-Patchwork-Id: 2305401 Return-Path: X-Original-To: patchwork-davinci@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork1.kernel.org Received: from arroyo.ext.ti.com (arroyo.ext.ti.com [192.94.94.40]) by patchwork1.kernel.org (Postfix) with ESMTP id 7D78040213 for ; Wed, 20 Mar 2013 06:41:36 +0000 (UTC) Received: from dlelxv30.itg.ti.com ([172.17.2.17]) by arroyo.ext.ti.com (8.13.7/8.13.7) with ESMTP id r2K6faOm017651 for ; Wed, 20 Mar 2013 01:41:36 -0500 Received: from DFLE73.ent.ti.com (dfle73.ent.ti.com [128.247.5.110]) by dlelxv30.itg.ti.com (8.13.8/8.13.8) with ESMTP id r2K6fa59008421 for ; Wed, 20 Mar 2013 01:41:36 -0500 Received: from dlelxv23.itg.ti.com (172.17.1.198) by DFLE73.ent.ti.com (128.247.5.110) with Microsoft SMTP Server id 14.2.342.3; Wed, 20 Mar 2013 01:41:35 -0500 Received: from linux.omap.com (dlelxs01.itg.ti.com [157.170.227.31]) by dlelxv23.itg.ti.com (8.13.8/8.13.8) with ESMTP id r2K6fZ1j007860 for ; Wed, 20 Mar 2013 01:41:35 -0500 Received: from linux.omap.com (localhost [127.0.0.1]) by linux.omap.com (Postfix) with ESMTP id E82E980627 for ; Wed, 20 Mar 2013 00:41:35 -0600 (CST) X-Original-To: davinci-linux-open-source@linux.davincidsp.com Delivered-To: davinci-linux-open-source@linux.davincidsp.com Received: from dbdp20.itg.ti.com (dbdp20.itg.ti.com [172.24.170.38]) by linux.omap.com (Postfix) with ESMTP id 88CAE80626 for ; Wed, 20 Mar 2013 00:41:24 -0600 (CST) Received: from DBDE71.ent.ti.com (localhost [127.0.0.1]) by dbdp20.itg.ti.com (8.13.8/8.13.8) with ESMTP id r2K6fNmw018669; Wed, 20 Mar 2013 12:11:23 +0530 (IST) Received: from dbdp32.itg.ti.com (172.24.170.251) by DBDE71.ent.ti.com (172.24.170.149) with Microsoft SMTP Server id 14.1.323.3; Wed, 20 Mar 2013 12:11:23 +0530 Received: from ucmsshproxy.india.ext.ti.com (dbdp20.itg.ti.com [172.24.170.38]) by dbdp32.itg.ti.com (8.13.8/8.13.8) with SMTP id r2K6fMTq019639; Wed, 20 Mar 2013 12:11:22 +0530 Received: from symphony.india.ext.ti.com (unknown [192.168.247.13]) by ucmsshproxy.india.ext.ti.com (Postfix) with ESMTP id DD989158002; Wed, 20 Mar 2013 12:11:22 +0530 (IST) Received: from ubuntu-psp-linux.india.ext.ti.com (ubuntu-psp-linux [192.168.247.46]) by symphony.india.ext.ti.com (8.11.7p1+Sun/8.11.7) with ESMTP id r2K6fMR20006; Wed, 20 Mar 2013 12:11:22 +0530 (IST) From: Philip Avinash To: , Subject: [PATCH v2 2/3] arm: davinci: clock node support for ECAP & EHRPWM Date: Wed, 20 Mar 2013 12:11:53 +0530 Message-ID: <1363761714-15034-3-git-send-email-avinashphilip@ti.com> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1363761714-15034-1-git-send-email-avinashphilip@ti.com> References: <1363761714-15034-1-git-send-email-avinashphilip@ti.com> MIME-Version: 1.0 CC: , Philip Avinash , , X-BeenThere: davinci-linux-open-source@linux.davincidsp.com X-Mailman-Version: 2.1.12 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: Errors-To: davinci-linux-open-source-bounces+patchwork-davinci=patchwork.kernel.org@linux.davincidsp.com Add clock node support for ECAP and EHRPWM modules. Also adds TBCLK for EHRWPM TBCLK to comply with pwm-tiehrpwm driver. Signed-off-by: Philip Avinash --- Changes Since v1: - TBCLK make it as actual clock with enable/disable feature. :100644 100644 0c4a26d... dbed75c... M arch/arm/mach-davinci/da850.c :100644 100644 de439b7... be77ce2... M arch/arm/mach-davinci/include/mach/da8xx.h arch/arm/mach-davinci/da850.c | 46 ++++++++++++++++++++++++++++ arch/arm/mach-davinci/include/mach/da8xx.h | 1 + 2 files changed, 47 insertions(+) diff --git a/arch/arm/mach-davinci/da850.c b/arch/arm/mach-davinci/da850.c index 0c4a26d..dbed75c 100644 --- a/arch/arm/mach-davinci/da850.c +++ b/arch/arm/mach-davinci/da850.c @@ -383,6 +383,49 @@ static struct clk dsp_clk = { .flags = PSC_LRST | PSC_FORCE, }; +static struct clk ehrpwm_clk = { + .name = "ehrpwm", + .parent = &pll0_sysclk2, + .lpsc = DA8XX_LPSC1_PWM, + .gpsc = 1, + .flags = DA850_CLK_ASYNC3, +}; + +#define DA8XX_EHRPWM_TBCLKSYNC BIT(12) + +void tblck_enable(struct clk *clk) +{ + u32 val; + + val = readl(DA8XX_SYSCFG0_VIRT(DA8XX_CFGCHIP1_REG)); + val |= DA8XX_EHRPWM_TBCLKSYNC; + writel(val, DA8XX_SYSCFG0_VIRT(DA8XX_CFGCHIP1_REG)); +} + +void tblck_disable(struct clk *clk) +{ + u32 val; + + val = readl(DA8XX_SYSCFG0_VIRT(DA8XX_CFGCHIP1_REG)); + val &= ~DA8XX_EHRPWM_TBCLKSYNC; + writel(val, DA8XX_SYSCFG0_VIRT(DA8XX_CFGCHIP1_REG)); +} + +static struct clk ehrpwm_tbclk = { + .name = "ehrpwm_tbclk", + .parent = &ehrpwm_clk, + .clk_enable = tblck_enable, + .clk_disable = tblck_disable, +}; + +static struct clk ecap_clk = { + .name = "ecap", + .parent = &pll0_sysclk2, + .lpsc = DA8XX_LPSC1_ECAP, + .gpsc = 1, + .flags = DA850_CLK_ASYNC3, +}; + static struct clk_lookup da850_clks[] = { CLK(NULL, "ref", &ref_clk), CLK(NULL, "pll0", &pll0_clk), @@ -430,6 +473,9 @@ static struct clk_lookup da850_clks[] = { CLK("vpif", NULL, &vpif_clk), CLK("ahci", NULL, &sata_clk), CLK("davinci-rproc.0", NULL, &dsp_clk), + CLK("ehrpwm", "fck", &ehrpwm_clk), + CLK("ehrpwm", "tbclk", &ehrpwm_tbclk), + CLK("ecap", "fck", &ecap_clk), CLK(NULL, NULL, NULL), }; diff --git a/arch/arm/mach-davinci/include/mach/da8xx.h b/arch/arm/mach-davinci/include/mach/da8xx.h index de439b7..be77ce2 100644 --- a/arch/arm/mach-davinci/include/mach/da8xx.h +++ b/arch/arm/mach-davinci/include/mach/da8xx.h @@ -55,6 +55,7 @@ extern unsigned int da850_max_speed; #define DA8XX_SYSCFG0_VIRT(x) (da8xx_syscfg0_base + (x)) #define DA8XX_JTAG_ID_REG 0x18 #define DA8XX_CFGCHIP0_REG 0x17c +#define DA8XX_CFGCHIP1_REG 0x180 #define DA8XX_CFGCHIP2_REG 0x184 #define DA8XX_CFGCHIP3_REG 0x188