From patchwork Mon Aug 5 16:14:53 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Joel Fernandes X-Patchwork-Id: 2838800 Return-Path: X-Original-To: patchwork-davinci@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 12647BF535 for ; Mon, 5 Aug 2013 16:21:16 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id ADEBA202B1 for ; Mon, 5 Aug 2013 16:21:14 +0000 (UTC) Received: from bear.ext.ti.com (bear.ext.ti.com [192.94.94.41]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id AE6782027D for ; Mon, 5 Aug 2013 16:21:12 +0000 (UTC) Received: from dlelxv90.itg.ti.com ([172.17.2.17]) by bear.ext.ti.com (8.13.7/8.13.7) with ESMTP id r75GK6uM020992; Mon, 5 Aug 2013 11:20:06 -0500 Received: from DFLE72.ent.ti.com (dfle72.ent.ti.com [128.247.5.109]) by dlelxv90.itg.ti.com (8.14.3/8.13.8) with ESMTP id r75GK64j002201; Mon, 5 Aug 2013 11:20:06 -0500 Received: from dlelxv23.itg.ti.com (172.17.1.198) by DFLE72.ent.ti.com (128.247.5.109) with Microsoft SMTP Server id 14.2.342.3; Mon, 5 Aug 2013 11:20:05 -0500 Received: from linux.omap.com (dlelxs01.itg.ti.com [157.170.227.31]) by dlelxv23.itg.ti.com (8.13.8/8.13.8) with ESMTP id r75GK50v010022; Mon, 5 Aug 2013 11:20:05 -0500 Received: from linux.omap.com (localhost [127.0.0.1]) by linux.omap.com (Postfix) with ESMTP id C1A6380626; Mon, 5 Aug 2013 11:20:05 -0500 (CDT) X-Original-To: davinci-linux-open-source@linux.davincidsp.com Delivered-To: davinci-linux-open-source@linux.davincidsp.com Received: from dlelxv90.itg.ti.com (dlelxv90.itg.ti.com [172.17.2.17]) by linux.omap.com (Postfix) with ESMTP id 68B7E80627 for ; Mon, 5 Aug 2013 11:15:12 -0500 (CDT) Received: from DFLE73.ent.ti.com (dfle73.ent.ti.com [128.247.5.110]) by dlelxv90.itg.ti.com (8.14.3/8.13.8) with ESMTP id r75GFCS0022259; Mon, 5 Aug 2013 11:15:12 -0500 Received: from dlelxv22.itg.ti.com (172.17.1.197) by DFLE73.ent.ti.com (128.247.5.110) with Microsoft SMTP Server id 14.2.342.3; Mon, 5 Aug 2013 11:15:12 -0500 Received: from joel-laptop.itg.ti.com (h0-56.vpn.ti.com [172.24.0.56]) by dlelxv22.itg.ti.com (8.13.8/8.13.8) with ESMTP id r75GEv1Q026253; Mon, 5 Aug 2013 11:15:11 -0500 From: Joel Fernandes To: Tony Lindgren , Sekhar Nori , Santosh Shilimkar , Sricharan R , Rajendra Nayak , Lokesh Vutla , Matt Porter , Grant Likely , Rob Herring , Vinod Koul , Dan Williams , Mark Brown , Benoit Cousson , Russell King , Arnd Bergmann , Olof Johansson , Balaji TK , Gururaja Hebbar , Chris Ball , Jason Kridner Subject: [PATCH v3 08/12] dma: edma: Add one more required slot to MAX slots Date: Mon, 5 Aug 2013 11:14:53 -0500 Message-ID: <1375719297-12871-9-git-send-email-joelf@ti.com> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1375719297-12871-1-git-send-email-joelf@ti.com> References: <1375719297-12871-1-git-send-email-joelf@ti.com> MIME-Version: 1.0 CC: Linux DaVinci Kernel List , Joel Fernandes , Linux MMC List , Linux Kernel Mailing List , Linux OMAP List , Linux ARM Kernel List X-BeenThere: davinci-linux-open-source@linux.davincidsp.com X-Mailman-Version: 2.1.12 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: Errors-To: davinci-linux-open-source-bounces@linux.davincidsp.com X-Spam-Status: No, score=-5.2 required=5.0 tests=BAYES_00,KHOP_BIG_TO_CC, RCVD_IN_DNSWL_HI,UNPARSEABLE_RELAY autolearn=ham version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP We'd now need a separate slot just for the channel and separate ones for the 2 linked sets, so we make adjustments to allocate an extra channel accordingly. Signed-off-by: Joel Fernandes --- drivers/dma/edma.c | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/drivers/dma/edma.c b/drivers/dma/edma.c index a242269..df50a04 100644 --- a/drivers/dma/edma.c +++ b/drivers/dma/edma.c @@ -48,7 +48,7 @@ /* Max of 16 segments per channel to conserve PaRAM slots */ #define MAX_NR_SG 16 -#define EDMA_MAX_SLOTS MAX_NR_SG +#define EDMA_MAX_SLOTS (MAX_NR_SG+1) #define EDMA_DESCRIPTORS 16 struct edma_desc { @@ -311,6 +311,9 @@ static struct dma_async_tx_descriptor *edma_prep_slave_sg( num_slots_needed = sg_len > MAX_NR_SG ? MAX_NR_SG : sg_len; + /* Allocate one extra to account for the channel itself */ + num_slots_needed++; + for (i = 0; i < num_slots_needed; i++) { if (echan->slot[i] < 0) { echan->slot[i] =