From patchwork Tue Sep 24 13:46:05 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Paul Chavent X-Patchwork-Id: 2989421 Return-Path: X-Original-To: patchwork-davinci@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 04814BFF0B for ; Fri, 4 Oct 2013 16:43:01 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id F41A920324 for ; Fri, 4 Oct 2013 16:42:59 +0000 (UTC) Received: from arroyo.ext.ti.com (arroyo.ext.ti.com [192.94.94.40]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 5CFAE201B9 for ; Fri, 4 Oct 2013 16:42:58 +0000 (UTC) Received: from dflxv15.itg.ti.com ([128.247.5.124]) by arroyo.ext.ti.com (8.13.7/8.13.7) with ESMTP id r94Gfm53022756; Fri, 4 Oct 2013 11:41:48 -0500 Received: from DLEE71.ent.ti.com (dlee71.ent.ti.com [157.170.170.114]) by dflxv15.itg.ti.com (8.14.3/8.13.8) with ESMTP id r94GflIh030244; Fri, 4 Oct 2013 11:41:47 -0500 Received: from dflp33.itg.ti.com (10.64.6.16) by DLEE71.ent.ti.com (157.170.170.114) with Microsoft SMTP Server id 14.2.342.3; Fri, 4 Oct 2013 11:41:47 -0500 Received: from linux.omap.com (dlelxs01.itg.ti.com [157.170.227.31]) by dflp33.itg.ti.com (8.14.3/8.13.8) with ESMTP id r94GflA5014725; Fri, 4 Oct 2013 11:41:47 -0500 Received: from linux.omap.com (localhost [127.0.0.1]) by linux.omap.com (Postfix) with ESMTP id 89B1180627; Fri, 4 Oct 2013 11:41:47 -0500 (CDT) X-Original-To: davinci-linux-open-source@linux.davincidsp.com Delivered-To: davinci-linux-open-source@linux.davincidsp.com Received: from dflp53.itg.ti.com (dflp53.itg.ti.com [128.247.5.6]) by linux.omap.com (Postfix) with ESMTP id 35E8480626 for ; Tue, 24 Sep 2013 08:54:08 -0500 (CDT) Received: from white.ext.ti.com (white.ext.ti.com [192.94.93.38]) by dflp53.itg.ti.com (8.13.8/8.13.8) with ESMTP id r8ODs8Rw000891 for ; Tue, 24 Sep 2013 08:54:08 -0500 (CDT) Received: from mail6.bemta8.messagelabs.com (mail6.bemta8.messagelabs.com [216.82.243.55]) by white.ext.ti.com (8.13.7/8.13.7) with ESMTP id r8ODs73Z017534 for ; Tue, 24 Sep 2013 08:54:07 -0500 Received: from [216.82.242.147:36617] by server-4.bemta-8.messagelabs.com id 2D/98-08470-F7991425; Tue, 24 Sep 2013 13:54:07 +0000 X-Env-Sender: Paul.Chavent@onera.fr X-Msg-Ref: server-6.tower-95.messagelabs.com!1380030845!20906343!1 X-Originating-IP: [134.212.190.4] X-SpamReason: No, hits=0.0 required=7.0 tests= X-StarScan-Received: X-StarScan-Version: 6.9.12; banners=-,-,- X-VirusChecked: Checked Received: (qmail 22943 invoked from network); 24 Sep 2013 13:54:05 -0000 Received: from briaree.onecert.fr (HELO briaree.onecert.fr) (134.212.190.4) by server-6.tower-95.messagelabs.com with SMTP; 24 Sep 2013 13:54:05 -0000 Received: from neree.onecert.fr (thetis.onecert.fr [134.212.178.12]) by briaree.onecert.fr (8.14.3/8.14.3/ONERA-SRI) with ESMTP id r8ODqcKU008791; Tue, 24 Sep 2013 15:52:38 +0200 Received: from neree.onecert.fr (thetis.antiviral [127.0.0.1]) by neree.onecert.fr (8.14.3/8.14.3/ONERA-SRI) with ESMTP id r8ODqcUb004410; Tue, 24 Sep 2013 15:52:38 +0200 Received: from wdcsd911h.onecert.fr (wdcsd911h.cert.fr [134.212.241.58]) by neree.onecert.fr (8.14.3/8.14.3/ONERA-SRI) with ESMTP id r8ODqaWU004402; Tue, 24 Sep 2013 15:52:36 +0200 From: Paul Chavent To: , , , , , Subject: [PATCH] ARM: davinci: usb: provide minimal support for da850. Date: Tue, 24 Sep 2013 15:46:05 +0200 Message-ID: <1380030365-30373-1-git-send-email-paul.chavent@onera.fr> X-Mailer: git-send-email 1.7.12.1 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.2.3 (briaree.onecert.fr [134.212.190.4]); Tue, 24 Sep 2013 15:52:39 +0200 (CEST) X-Virus-Scanned: clamav-milter 0.97.8 at briaree.onecert.fr X-Virus-Status: Clean X-Spam-Status: No, score=-6.9 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, UNPARSEABLE_RELAY autolearn=ham version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Mailman-Approved-At: Fri, 04 Oct 2013 11:41:46 -0500 CC: Paul Chavent X-BeenThere: davinci-linux-open-source@linux.davincidsp.com X-Mailman-Version: 2.1.12 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: Errors-To: davinci-linux-open-source-bounces@linux.davincidsp.com X-Virus-Scanned: ClamAV using ClamSMTP As for the da830 and hawk boards, the da850 can provide minimalist usb 1.1 implementation. Moreover, this patch has only been tested with the OHCI (on an OMAP L138 EVM / DA850 board), not with the Inventra HC (that seems broken for the DA8XX). This patch is inspired by the hawk board implementation. Signed-off-by: Paul Chavent --- arch/arm/mach-davinci/board-da850-evm.c | 153 ++++++++++++++++++++++++++++++++ 1 file changed, 153 insertions(+) diff --git a/arch/arm/mach-davinci/board-da850-evm.c b/arch/arm/mach-davinci/board-da850-evm.c index dd1fb24..f0bee9d 100644 --- a/arch/arm/mach-davinci/board-da850-evm.c +++ b/arch/arm/mach-davinci/board-da850-evm.c @@ -62,6 +62,9 @@ #define DA850_MII_MDIO_CLKEN_PIN GPIO_TO_PIN(2, 6) +#define DA850_USB1_VBUS_PIN GPIO_TO_PIN(2, 4) +#define DA850_USB1_OC_PIN GPIO_TO_PIN(6, 13) + static struct mtd_partition da850evm_spiflash_part[] = { [0] = { .name = "UBL", @@ -1431,6 +1434,155 @@ static __init int da850_wl12xx_init(void) #endif /* CONFIG_DA850_WL12XX */ +#ifdef CONFIG_USB + +static irqreturn_t da850_usb_ocic_irq(int irq, void *dev_id); +static da8xx_ocic_handler_t da850_usb_ocic_handler; + +static const short da850_usb11_pins[] = { + DA850_GPIO2_4, DA850_GPIO6_13, + -1 +}; + +static int da850_usb_set_power(unsigned port, int on) +{ + gpio_set_value(DA850_USB1_VBUS_PIN, on); + return 0; +} + +static int da850_usb_get_power(unsigned port) +{ + return gpio_get_value(DA850_USB1_VBUS_PIN); +} + +static int da850_usb_get_oci(unsigned port) +{ + return !gpio_get_value(DA850_USB1_OC_PIN); +} + +static int da850_usb_ocic_notify(da8xx_ocic_handler_t handler) +{ + int irq = gpio_to_irq(DA850_USB1_OC_PIN); + int error = 0; + + if (handler != NULL) { + da850_usb_ocic_handler = handler; + + error = request_irq(irq, da850_usb_ocic_irq, + IRQF_DISABLED | IRQF_TRIGGER_RISING | + IRQF_TRIGGER_FALLING, + "OHCI over-current indicator", NULL); + if (error) + pr_err("%s: could not request IRQ to watch " + "over-current indicator changes\n", __func__); + } else { + free_irq(irq, NULL); + } + return error; +} + +static struct da8xx_ohci_root_hub da850_usb11_pdata = { + .set_power = da850_usb_set_power, + .get_power = da850_usb_get_power, + .get_oci = da850_usb_get_oci, + .ocic_notify = da850_usb_ocic_notify, + /* TPS2087 switch @ 5V */ + .potpgt = (3 + 1) / 2, /* 3 ms max */ +}; + +static irqreturn_t da850_usb_ocic_irq(int irq, void *dev_id) +{ + da850_usb_ocic_handler(&da850_usb11_pdata, 1); + return IRQ_HANDLED; +} + +static __init void da850_usb_init(void) +{ + void __iomem *cfg_chip2_base; + int ret; + u32 val; + + /* + * Set up USB clock/mode in the CFGCHIP2 register. + */ + + cfg_chip2_base = DA8XX_SYSCFG0_VIRT(DA8XX_CFGCHIP2_REG); + + val = __raw_readl(cfg_chip2_base); + + /* USB2.0 PHY reference clock is 24 MHz */ + val &= ~CFGCHIP2_REFFREQ; + val |= CFGCHIP2_REFFREQ_24MHZ; + + /* + * Select internal reference clock for USB 2.0 PHY + * and use it as a clock source for USB 1.1 PHY + * (this is the default setting anyway). + */ + val &= ~CFGCHIP2_USB1PHYCLKMUX; + val |= CFGCHIP2_USB2PHYCLKMUX; + + /* + * We have to override VBUS/ID signals when MUSB is configured into the + * host-only mode -- ID pin will float if no cable is connected, so the + * controller won't be able to drive VBUS thinking that it's a B-device. + * Otherwise, we want to use the OTG mode and enable VBUS comparators. + */ + val &= ~CFGCHIP2_OTGMODE; +#ifdef CONFIG_USB_MUSB_HOST + val |= CFGCHIP2_FORCE_HOST; +#else + val |= CFGCHIP2_SESENDEN | CFGCHIP2_VBDTCTEN; +#endif + + /* configure the CFGCHIP2 register */ + __raw_writel(val, cfg_chip2_base); + + ret = davinci_cfg_reg_list(da850_usb11_pins); + if (ret) { + pr_warn("%s: USB 1.1 PinMux setup failed: %d\n", __func__, ret); + return; + } + + ret = gpio_request_one(DA850_USB1_VBUS_PIN, + GPIOF_DIR_OUT, "USB1 VBUS"); + if (ret < 0) { + pr_err("%s: failed to request GPIO for USB 1.1 port " + "power control: %d\n", __func__, ret); + return; + } + + ret = gpio_request_one(DA850_USB1_OC_PIN, + GPIOF_DIR_IN, "USB1 OC"); + if (ret < 0) { + pr_err("%s: failed to request GPIO for USB 1.1 port " + "over-current indicator: %d\n", __func__, ret); + goto usb11_setup_oc_fail; + } + + ret = da8xx_register_usb11(&da850_usb11_pdata); + if (ret) { + pr_warn("%s: USB 1.1 registration failed: %d\n", __func__, ret); + goto usb11_setup_fail; + } + + return; + +usb11_setup_fail: + gpio_free(DA850_USB1_OC_PIN); +usb11_setup_oc_fail: + gpio_free(DA850_USB1_VBUS_PIN); +} + +#else /* CONFIG_USB */ + +static __init void da850_usb_init(void) +{ + return 0; +} + +#endif /* CONFIG_USB */ + #define DA850EVM_SATA_REFCLKPN_RATE (100 * 1000 * 1000) static __init void da850_evm_init(void) @@ -1453,6 +1605,7 @@ static __init void da850_evm_init(void) if (ret) pr_warn("%s: I2C0 registration failed: %d\n", __func__, ret); + da850_usb_init(); ret = da8xx_register_watchdog(); if (ret)