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Fri, 08 Nov 2013 02:12:32 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=qokpvFOJf98ECY4A7ZOoL18WL22epKmXbA3G4gN95xI=; b=vVBgDkgndz59uzHt5aWGAHDFhXABLWpYJxuUTYTo6Tv8x+pTXqXdcoIRxoo86Vvafv i54FzLHUaNjCr14ocawFufwG8cw3WJmpxo3VNRL/ssbzL3Hlwr8wgA5UgnRlJXCrO2TI +aDhFk/uCb0QXqWH+xovUIIFuADhsUUf2oFyunWAwcyiySqNowQVW+P4623iq73yGux1 jM4PkmLwtPaTxiYThG+eL8hKfwd0uacRwG4thQHr1/VQIXd2h2c3WOrgCZjw02D0sra2 IFHAVaXPZvzPVYnDcLAIoWHEjWB7EWpeDc9VjGezjSAaZho09ANURJ90pr6KfeRBmSSt z5XQ== X-Received: by 10.68.59.202 with SMTP id b10mr14347810pbr.78.1383905552209; Fri, 08 Nov 2013 02:12:32 -0800 (PST) Received: from localhost.localdomain ([182.156.67.248]) by mx.google.com with ESMTPSA id fa4sm13061280pab.17.2013.11.08.02.12.24 for (version=TLSv1.1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Fri, 08 Nov 2013 02:12:31 -0800 (PST) From: Prabhakar Lad To: Sekhar Nori , Linus Walleij , Grygorii Strashko Subject: [PATCH v5 3/7] gpio: davinci: use irqdomain Date: Fri, 8 Nov 2013 15:41:46 +0530 Message-ID: <1383905510-31760-4-git-send-email-prabhakar.csengg@gmail.com> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1383905510-31760-1-git-send-email-prabhakar.csengg@gmail.com> References: <1383905510-31760-1-git-send-email-prabhakar.csengg@gmail.com> CC: Mark Rutland , , DLOS , Pawel Moll , , Stephen Warren , LKML , Rob Herring , , Rob Landley , Grant Likely , Ian Campbell , LAK X-BeenThere: davinci-linux-open-source@linux.davincidsp.com X-Mailman-Version: 2.1.12 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: Errors-To: davinci-linux-open-source-bounces+patchwork-davinci=patchwork.kernel.org@linux.davincidsp.com X-Spam-Status: No, score=-6.8 required=5.0 tests=BAYES_00, DKIM_ADSP_CUSTOM_MED, DKIM_SIGNED, FREEMAIL_FROM, RCVD_IN_DNSWL_HI, T_DKIM_INVALID, UNPARSEABLE_RELAY autolearn=ham version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: "Lad, Prabhakar" This patch converts the davinci gpio driver to use irqdomain support. Signed-off-by: Lad, Prabhakar --- drivers/gpio/gpio-davinci.c | 74 +++++++++++++++------------- include/linux/platform_data/gpio-davinci.h | 2 +- 2 files changed, 41 insertions(+), 35 deletions(-) diff --git a/drivers/gpio/gpio-davinci.c b/drivers/gpio/gpio-davinci.c index ca3d7fd..b149239 100644 --- a/drivers/gpio/gpio-davinci.c +++ b/drivers/gpio/gpio-davinci.c @@ -16,6 +16,7 @@ #include #include #include +#include #include #include @@ -282,8 +283,7 @@ gpio_irq_handler(unsigned irq, struct irq_desc *desc) desc->irq_data.chip->irq_ack(&desc->irq_data); while (1) { u32 status; - int n; - int res; + int bit; /* ack any irqs */ status = readl(&g->intstat) & mask; @@ -292,17 +292,11 @@ gpio_irq_handler(unsigned irq, struct irq_desc *desc) writel(status, &g->intstat); /* now demux them to the right lowlevel handler */ - n = d->irq_base; - if (irq & 1) { - n += 16; - status >>= 16; - } - while (status) { - res = ffs(status); - n += res; - generic_handle_irq(n - 1); - status >>= res; + bit = __ffs(status); + status &= ~(1 << bit); + generic_handle_irq(irq_find_mapping(d->irq_domain, + bit)); } } desc->irq_data.chip->irq_unmask(&desc->irq_data); @@ -313,10 +307,7 @@ static int gpio_to_irq_banked(struct gpio_chip *chip, unsigned offset) { struct davinci_gpio_controller *d = chip2controller(chip); - if (d->irq_base >= 0) - return d->irq_base + offset; - else - return -ENODEV; + return irq_create_mapping(d->irq_domain, offset); } static int gpio_to_irq_unbanked(struct gpio_chip *chip, unsigned offset) @@ -354,6 +345,28 @@ static int gpio_irq_type_unbanked(struct irq_data *data, unsigned trigger) return 0; } +static int davinci_gpio_irq_map(struct irq_domain *d, unsigned int irq, + irq_hw_number_t hw) +{ + struct davinci_gpio_controller *chip = d->host_data; + unsigned gpio = chip->chip.base + hw; + struct davinci_gpio_regs __iomem *g = gpio2regs(gpio); + + irq_set_chip_and_handler_name(irq, &gpio_irqchip, handle_simple_irq, + "davinci_gpio"); + irq_set_irq_type(irq, IRQ_TYPE_NONE); + irq_set_chip_data(irq, (__force void *)g); + irq_set_handler_data(irq, (void *)__gpio_mask(gpio)); + set_irq_flags(irq, IRQF_VALID); + + return 0; +} + +static const struct irq_domain_ops davinci_gpio_irq_ops = { + .map = davinci_gpio_irq_map, + .xlate = irq_domain_xlate_onetwocell, +}; + /* * NOTE: for suspend/resume, probably best to make a platform_device with * suspend_late/resume_resume calls hooking into results of the set_wake() @@ -402,9 +415,16 @@ static int davinci_gpio_irq_setup(struct platform_device *pdev) */ for (gpio = 0, bank = 0; gpio < ngpio; bank++, gpio += 32) { chips[bank].chip.to_irq = gpio_to_irq_banked; - chips[bank].irq_base = pdata->gpio_unbanked - ? -EINVAL - : (pdata->intc_irq_num + gpio); + if (!pdata->gpio_unbanked) { + chips[bank].irq_domain = + irq_domain_add_linear(NULL, + chips[bank].chip.ngpio, + &davinci_gpio_irq_ops, + &chips[bank]); + + if (!chips[bank].irq_domain) + return -ENOMEM; + } } /* @@ -447,11 +467,7 @@ static int davinci_gpio_irq_setup(struct platform_device *pdev) * Or, AINTC can handle IRQs for banks of 16 GPIO IRQs, which we * then chain through our own handler. */ - for (gpio = 0, irq = gpio_to_irq(0), bank = 0; - gpio < ngpio; - bank++, bank_irq++) { - unsigned i; - + for (gpio = 0, bank = 0; gpio < ngpio; bank++, bank_irq++, gpio += 16) { /* disabled by default, enabled only as needed */ g = gpio2regs(gpio); writel(~0, &g->clr_falling); @@ -467,14 +483,6 @@ static int davinci_gpio_irq_setup(struct platform_device *pdev) */ irq_set_handler_data(bank_irq, &chips[gpio / 32]); - for (i = 0; i < 16 && gpio < ngpio; i++, irq++, gpio++) { - irq_set_chip(irq, &gpio_irqchip); - irq_set_chip_data(irq, (__force void *)g); - irq_set_handler_data(irq, (void *)__gpio_mask(gpio)); - irq_set_handler(irq, handle_simple_irq); - set_irq_flags(irq, IRQF_VALID); - } - binten |= BIT(bank); } @@ -485,8 +493,6 @@ done: */ writel(binten, gpio_base + BINTEN); - printk(KERN_INFO "DaVinci: %d gpio irqs\n", irq - gpio_to_irq(0)); - return 0; } diff --git a/include/linux/platform_data/gpio-davinci.h b/include/linux/platform_data/gpio-davinci.h index 6efd202..0c3551b 100644 --- a/include/linux/platform_data/gpio-davinci.h +++ b/include/linux/platform_data/gpio-davinci.h @@ -34,7 +34,7 @@ struct davinci_gpio_platform_data { struct davinci_gpio_controller { struct gpio_chip chip; - int irq_base; + struct irq_domain *irq_domain; /* Serialize access to GPIO registers */ spinlock_t lock; void __iomem *regs;