From patchwork Thu Sep 17 00:04:58 2009 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Mark A. Greer" X-Patchwork-Id: 48186 Received: from devils.ext.ti.com (devils.ext.ti.com [198.47.26.153]) by demeter.kernel.org (8.14.2/8.14.2) with ESMTP id n8H06xxr016615 for ; Thu, 17 Sep 2009 00:06:59 GMT Received: from dlep35.itg.ti.com ([157.170.170.118]) by devils.ext.ti.com (8.13.7/8.13.7) with ESMTP id n8H058ct025215; Wed, 16 Sep 2009 19:05:08 -0500 Received: from linux.omap.com (localhost [127.0.0.1]) by dlep35.itg.ti.com (8.13.7/8.13.7) with ESMTP id n8H057Nu000590; Wed, 16 Sep 2009 19:05:07 -0500 (CDT) Received: from linux.omap.com (localhost [127.0.0.1]) by linux.omap.com (Postfix) with ESMTP id 6F57180627; Wed, 16 Sep 2009 19:05:07 -0500 (CDT) X-Original-To: Davinci-linux-open-source@linux.davincidsp.com Delivered-To: Davinci-linux-open-source@linux.davincidsp.com Received: from dflp52.itg.ti.com (dflp52.itg.ti.com [128.247.22.96]) by linux.omap.com (Postfix) with ESMTP id AEA2F80626 for ; Wed, 16 Sep 2009 19:05:04 -0500 (CDT) Received: from neches.ext.ti.com (localhost [127.0.0.1]) by dflp52.itg.ti.com (8.13.7/8.13.7) with ESMTP id n8H054uV008399 for ; Wed, 16 Sep 2009 19:05:04 -0500 (CDT) Received: from mail33-tx2-R.bigfish.com (mail-tx2.bigfish.com [65.55.88.111]) by neches.ext.ti.com (8.13.7/8.13.7) with ESMTP id n8H054DB011544 for ; Wed, 16 Sep 2009 19:05:04 -0500 Received: from mail33-tx2 (localhost.localdomain [127.0.0.1]) by mail33-tx2-R.bigfish.com (Postfix) with ESMTP id 55E1412E0107 for ; Thu, 17 Sep 2009 00:05:04 +0000 (UTC) X-SpamScore: 7 X-BigFish: vps7(zza4b1ozz1202hzzz2dh6bh63h) X-Spam-TCS-SCL: 2:0 X-MS-Exchange-Organization-Antispam-Report: OrigIP: 63.81.120.158; Service: EHS Received: by mail33-tx2 (MessageSwitch) id 1253145902962620_31535; Thu, 17 Sep 2009 00:05:02 +0000 (UCT) Received: from TX2EHSMHS004.bigfish.com (unknown [10.9.14.242]) by mail33-tx2.bigfish.com (Postfix) with ESMTP id DDBBB978046 for ; Thu, 17 Sep 2009 00:05:02 +0000 (UTC) Received: from gateway-1237.mvista.com (63.81.120.158) by TX2EHSMHS004.bigfish.com (10.9.99.104) with Microsoft SMTP Server id 14.0.482.32; Thu, 17 Sep 2009 00:05:02 +0000 Received: from mag.az.mvista.com (mag.az.mvista.com [10.50.1.99]) by hermes.mvista.com (Postfix) with ESMTP id 8A7E51B881; Wed, 16 Sep 2009 17:04:59 -0700 (PDT) Received: from mgreer by mag.az.mvista.com with local (Exim 4.69) (envelope-from ) id 1Mo4Uc-0001bT-E1; Wed, 16 Sep 2009 17:04:58 -0700 Date: Wed, 16 Sep 2009 17:04:58 -0700 From: "Mark A. Greer" To: rtc-linux@googlegroups.com Message-ID: <20090917000458.GA6119@mag.az.mvista.com> MIME-Version: 1.0 Content-Disposition: inline User-Agent: Mutt/1.5.17+20080114 (2008-01-14) X-Reverse-DNS: unknown Cc: Davinci-linux-open-source@linux.davincidsp.com, linux-omap@vger.kernel.org Subject: [PATCH v2] rtc: make rtc-omap driver ioremap its register space X-BeenThere: davinci-linux-open-source@linux.davincidsp.com X-Mailman-Version: 2.1.4 Precedence: list List-Id: davinci-linux-open-source.linux.davincidsp.com List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: davinci-linux-open-source-bounces@linux.davincidsp.com Errors-To: davinci-linux-open-source-bounces@linux.davincidsp.com From: Mark A. Greer The rtc-omap driver currently assumes that the rtc's registers are at a fixed address and already mapped into virtual memory space. Remove those assumptions so the same driver can be used for similar devices that reside at different physical addresses (e.g., TI's DA8xx/OMAP-L13x SoC's). Also allow the possibility for the timer and alarm interrupts to use the same IRQ. Signed-off-by: Mark A. Greer CC: David Brownell Acked-by: David Brownell Acked-by: Kevin Hilman --- Sorry for the cross-posting but this is relevant to the different lists. This patch was tested on a da830 and a da850. It was only compiled for an omap1 platform (don't have the hardware) but it should be low risk. Note that the platform_device data is already set up in arch/arm/mach-omap1/devices.c so it those platforms should "Just Work(tm)". drivers/rtc/Kconfig | 7 ++++--- drivers/rtc/rtc-omap.c | 47 ++++++++++++++++++++++++++--------------------- 2 files changed, 30 insertions(+), 24 deletions(-) diff --git a/drivers/rtc/Kconfig b/drivers/rtc/Kconfig index 81adbdb..f06e885 100644 --- a/drivers/rtc/Kconfig +++ b/drivers/rtc/Kconfig @@ -539,10 +539,11 @@ comment "on-CPU RTC drivers" config RTC_DRV_OMAP tristate "TI OMAP1" - depends on ARCH_OMAP15XX || ARCH_OMAP16XX || ARCH_OMAP730 + depends on ARCH_OMAP15XX || ARCH_OMAP16XX || ARCH_OMAP730 || ARCH_DAVINCI_DA8XX help - Say "yes" here to support the real time clock on TI OMAP1 chips. - This driver can also be built as a module called rtc-omap. + Say "yes" here to support the real time clock on TI OMAP1 and + DA8xx/OMAP-L13x chips. This driver can also be built as a + module called rtc-omap. config RTC_DRV_S3C tristate "Samsung S3C series SoC RTC" diff --git a/drivers/rtc/rtc-omap.c b/drivers/rtc/rtc-omap.c index bd1ce8e..aa418d5 100644 --- a/drivers/rtc/rtc-omap.c +++ b/drivers/rtc/rtc-omap.c @@ -87,9 +87,10 @@ #define OMAP_RTC_INTERRUPTS_IT_ALARM (1<<3) #define OMAP_RTC_INTERRUPTS_IT_TIMER (1<<2) +static void __iomem *rtc_base; -#define rtc_read(addr) omap_readb(OMAP_RTC_BASE + (addr)) -#define rtc_write(val, addr) omap_writeb(val, OMAP_RTC_BASE + (addr)) +#define rtc_read(addr) __raw_readb(rtc_base + (addr)) +#define rtc_write(val, addr) __raw_writeb(val, rtc_base + (addr)) /* we rely on the rtc framework to handle locking (rtc->ops_lock), @@ -330,32 +331,31 @@ static int __init omap_rtc_probe(struct platform_device *pdev) return -ENOENT; } - /* NOTE: using static mapping for RTC registers */ res = platform_get_resource(pdev, IORESOURCE_MEM, 0); - if (res && res->start != OMAP_RTC_BASE) { - pr_debug("%s: RTC registers at %08x, expected %08x\n", - pdev->name, (unsigned) res->start, OMAP_RTC_BASE); + if (!res) { + pr_debug("%s: RTC resource data missing\n", pdev->name); return -ENOENT; } - if (res) - mem = request_mem_region(res->start, - res->end - res->start + 1, - pdev->name); - else - mem = NULL; + mem = request_mem_region(res->start, resource_size(res), pdev->name); if (!mem) { pr_debug("%s: RTC registers at %08x are not free\n", - pdev->name, OMAP_RTC_BASE); + pdev->name, res->start); return -EBUSY; } + rtc_base = ioremap(res->start, resource_size(res)); + if (!rtc_base) { + pr_debug("%s: RTC registers can't be mapped\n", pdev->name); + goto fail; + } + rtc = rtc_device_register(pdev->name, &pdev->dev, &omap_rtc_ops, THIS_MODULE); if (IS_ERR(rtc)) { pr_debug("%s: can't register RTC device, err %ld\n", pdev->name, PTR_ERR(rtc)); - goto fail; + goto fail0; } platform_set_drvdata(pdev, rtc); dev_set_drvdata(&rtc->dev, mem); @@ -380,13 +380,14 @@ static int __init omap_rtc_probe(struct platform_device *pdev) dev_name(&rtc->dev), rtc)) { pr_debug("%s: RTC timer interrupt IRQ%d already claimed\n", pdev->name, omap_rtc_timer); - goto fail0; + goto fail1; } - if (request_irq(omap_rtc_alarm, rtc_irq, IRQF_DISABLED, - dev_name(&rtc->dev), rtc)) { + if ((omap_rtc_timer != omap_rtc_alarm) && + (request_irq(omap_rtc_alarm, rtc_irq, IRQF_DISABLED, + dev_name(&rtc->dev), rtc))) { pr_debug("%s: RTC alarm interrupt IRQ%d already claimed\n", pdev->name, omap_rtc_alarm); - goto fail1; + goto fail2; } /* On boards with split power, RTC_ON_NOFF won't reset the RTC */ @@ -419,10 +420,12 @@ static int __init omap_rtc_probe(struct platform_device *pdev) return 0; -fail1: +fail2: free_irq(omap_rtc_timer, NULL); -fail0: +fail1: rtc_device_unregister(rtc); +fail0: + iounmap(rtc_base); fail: release_resource(mem); return -EIO; @@ -438,7 +441,9 @@ static int __exit omap_rtc_remove(struct platform_device *pdev) rtc_write(0, OMAP_RTC_INTERRUPTS_REG); free_irq(omap_rtc_timer, rtc); - free_irq(omap_rtc_alarm, rtc); + + if (omap_rtc_timer != omap_rtc_alarm) + free_irq(omap_rtc_alarm, rtc); release_resource(dev_get_drvdata(&rtc->dev)); rtc_device_unregister(rtc);